Claude Thibeault

Claude Thibeault
Professeur
Formation B.Ing. (UQAC), M.Sc.A., Ph.D. (Polytechnique Montréal)
Bureau A-2636
Téléphone 514 396-8669
Présentation

Département de génie électrique

Axes de recherche :

  • Technologies de l’information et des communications
  • Aérospatial

Expertises :

  • Vérification
  • Test en diagnostic des circuits intégrés
  • Microélectronique
  • Méthodologies de conception
  • Prototypage rapide pour télécommunications et vidéo numérique
  • Tolérance aux pannes
  • Modélisation du rendement
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IEEE Northeast Workshop on Circuits and Systems (NEWCAS)
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Canadian Conference on Electrical and Computer Engineering (CCECE)
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Canadian Conference on Electrical and Computer Engineering, 1995
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Integrated Communications, Navigation and Surveillance Conference (ICNS)
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IEEE North-East Workshop on Circuits and Systems (NEWCAS)
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Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA)
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IEEE Military Communications Conference (MILCOM)
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Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA)
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The 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) : technology, Tools and Applications : Proceedings
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2014 IEEE Workshop on Signal Processing Systems (SiPS)
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Canadian Conference on Electrical and Computer Engineering
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1994 IEEE International Symposium on Information Theory, 1994. Proceedings
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1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings
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ICMICE Prague 2014, International Conference on Modelling, Identification and Control Engineering
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25th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)
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Records of the 1993 IEEE International workshop on memory testing
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CMOS Emerging Technologies Workshop
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SAE 2013 AeroTech Congress and Exhibition (AEROTECH)
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2019 IEEE International Symposium on Circuits and Systems (ISCAS)
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17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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2nd Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS)
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ASME International Mechanical Engineering Congress and Exposition, Proceedings (IMECE)
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2015 IEEE East-West Design & Test Symposium (EWDTS)
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2015 IEEE 21st International On-Line Testing Symposium (IOLTS)
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Global Signal Processing Expo and Conference (GSPx)
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Proceedings of Design and Verification Conference (DVCon05)
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2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)
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2012 IEEE Military Communications Conference (MILCOM)
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2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC)
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50th Asilomar Conference on Signals, Systems and Computers
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Canadian Conference on Electrical and Computer Engineering
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38th Annual Conference on IEEE Industrial Electronics Society, IECON 2012
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2016 IEEE International Symposium on Circuits and Systems (ISCAS)
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2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)
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Proceedings of the IEEE International Mixed Signal Testing Workshop
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Fourth IEEE International Symposium on Signal Processing and Information Technology
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IEEE North-East Workshop on Circuits and Systems (NEWCAS)
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Proceedings, the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
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2015 IEEE Workshop on Signal Processing Systems (SiPS)
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Actes de conférence - le 3e Colloque Canadien sur les Circuits Intégrés Programmables (FPD'95) : technologie, outils et applications, Montréal, Québec, Canada, May 29 - June 1, 1995 the 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) = Procee
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Proceedings. The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
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IEEE North-East Workshop on Circuits and Systems (NEWCAS)
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15th IEEE VLSI Test Symposium
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2nd Annual IEEE Northeast Workshop on Circuits and Systems
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Canadian Conference on Electrical and Computer Engineering
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IEEE North-East Workshop on Circuits and Systems (NEWCAS)
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18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)
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IEEE 36th VLSI Test Symposium (VTS)
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Troisième conférence internationale sur l'automatisation industrielle, École de technologie supérieure, Montréal, 7-9 juin 1999 : actes de la conférence = Third International Conference on Industrial Automation, École de technologie supérieure, Montréal,
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IEEE North-East Workshop on Circuits and Systems (NEWCAS)
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2016 IEEE 34th VLSI Test Symposium (VTS)
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2014 IEEE 20th International On-Line Testing Symposium (IOLTS)
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Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA)
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8th IEEE International NEWCAS Conference (NEWCAS)
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1st Microsystems and Nanoelectronics Research Conference (MNRC)
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Formal Techniques for Safety-Critical Systems - 2nd International Workshop, FTSCS 2013, Revised Selected Papers
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2014 Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign (MEMOCODE)
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IEEE Canadian Conference on Electrical and Computer Engineering
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20th Asian Test Symposium (ATS)
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AIAA/IEEE Digital Avionics Systems Conference - Proceedings
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20th European Conference on Circuit Theory and Design (ECCTD)
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International Symposium on Signals, Circuits and Systems (ISSCS)
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2013 9th International Wireless Communications and Mobile Computing Conference, IWCMC 2013
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IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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5th Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)
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2012 Conference on Design and Architectures for Signal and Image Processing (DASIP)
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SAE 2015 AeroTech Congress & Exhibition
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Actes de conférence / Proceedings : Le 5e colloque canadien sur les circuits programmables (FPD'98) : The Fifth Canadian Workshop on Field-Programmable Devices (FPD'98)
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19th IEEE VLSI Test Symposium (VTS)
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IEEE North-East Workshop on Circuits and Systems (NEWCAS)
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IEEE 60th Vehicular Technology Conference (VTC)
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Handbook of Pattern Recognition and Computer Vision
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2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)
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Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA)
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2014 IEEE Global Conference on Signal and Information Processing (GlobalSIP)
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2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)
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International Test Conference
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Proceedings 13th IEEE VLSI Test Symposium
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2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS). Proceedings
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15th IEEE International New Circuits and Systems Conference (NEWCAS)
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2016 IEEE International Symposium on Circuits and Systems (ISCAS)
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25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
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18th IEEE VLSI Test Symposium
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International Test Conference
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IEEE North-East Workshop on Circuits and Systems (NEWCAS)
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IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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IEEE VLSI Test Symposium
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22nd IEEE VLSI Test Symposium
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17th IEEE VLSI Test Symposium
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IEEE International Workshop on Current and Defect Based Testing (DBT)
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IEEE International Workshop on Current and Defect Based Testing (DBT)
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20th IEEE VLSI Test Symposium
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IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
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IEEE International Workshop on Memory Technology, Design and Testing
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IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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IEEE International Test Conference
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Actes de conférence - le 3e Colloque Canadien sur les Circuits Intégrés Programmables (FPD'95) : technologie, outils et applications, Montréal, Québec, Canada, May 29 - June 1, 1995 the 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) = Procee
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Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA)
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IEEE 35th VLSI Test Symposium (VTS)
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IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
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2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC)
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1st Microsystems and Nanoelectronics Research Conference (MNRC)
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2015 21st IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
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Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA)
Cours et encadrements

Cours

SYS808 Technologies VLSI et ses applications (Automne 2019)
ELE739 Circuits intégrés programmables (FPGA) (Hiver 2019)

Encadrements

Mémoire à 21 crédits

    En codirection avec : Landry, René Jr
    Technique de Robustesse aux brouilleurs pour les récepteurs GPS par un traitement ADP, par Abi-Moussa,Rabih.
    Automne 2000

    Développement de la mise au point des circuits électroniques par émulateur, par AYOUB,ALBERT.
    Automne 2002

    Réalisation d'un prototype testable par la méthode de chaînes parallèles de courant, par Ben Letaifa,Abdelkader.
    Automne 2002

    En codirection avec : Gagnon, François
    Détection de signaux radar et estimation de leurs temps d'arrivée, par BONGO,ISABELLE.
    Hiver 2000

    En codirection avec : Belzile, Jean
    Conception et réalisation d'un dispositif de prétraitement de signaux radar en utilisant le VHDL, par Cherraj,Hassan.
    Hiver 2001

    Méthode de test basée sur les chaînes parallèles de courant, par HAMMACHE,HICHAM.
    Été 2003

    Amélioration de la méthode de diagnostic basée sur les signatures probabilistes de IDDQ, par Hariri,Yassine.
    Été 2002

Projet d'application à 12 crédits

    En codirection avec : Gagnon, François
    Amélioration des performances d'un modem programmable, par Al Sawda,Souha.
    Été 2000

    En codirection avec : Savaria, Yvon
    A cost model and yield evaluation of a VLSI/MCM System. (Le rapport est en anglais), par El Kafrouni,Michel.
    Été 1998

    Faisabilité de l'accès partagé à la table de décodage d'un décodeur à signature pour codes convolutionnels., par Konare,Benke.
    Hiver 1998

    Conception d'un système microcellulaire de communication numérique., par Ndir,Fatou.
    Été 1998

Projet d'application à 9 crédits

    Validation d'une méthode de diagnostic basée sur les signatures probabilistes de IDDQ, par Boisvert,Luc.
    Automne 1998

    Pilotes et composants synthétisés dans un environnement de codesign pour circuits reconfigurables (FPGA), par Rousseau,Stéphane.
    Hiver 2008

Rapport technique à 6 crédits

    En codirection avec : SLAMANI, MUSTAPHA
    Conception et réalisation d'un convertisseur analogique numérique pour un dispositif de contrôle automatique du gain dans les systèmes radar., par DIA,MOUHAMED RASSOUL.
    Automne 1998

    En codirection avec : Belzile, Jean
    Implantation d'une architecture améliorée d'un modulateur sigma delta du second ordre avec des intégrateurs de haute performance., par Hosseinzadeh,Ehssan.
    Automne 1998

Mémoire à 24 crédits

    En codirection avec : Savaria, Yvon
    Conception d'une plateforme de tests de circuits d'intégration directe sur tranche, par LECLERC,NORMAND.
    Automne 2003

    Optimisation des méthodes de tests des circuits numériques, par Tremblay,Daniel.
    Hiver 2007

Thèse de doctorat

    Étude de faisabilité d'une méthodologie de test exploitant le test par le courant IDDQ, et l'intéraction d'autres méthodes de test et de diagnostic, par Hariri,Yassine.
    Hiver 2008

Mémoire à 30 crédits

    Développement d'une infrastructure pour l'accélération sur matériel de la simulation numérique, par Provencher,Luc.
    Été 2010

    Enhancement and Validation of a Test Technique for Integrated Circuits, par El-Kafrouni,Roger.
    Hiver 2010

    Développement d'une méthodologie d'estimation de l'utilisation des ressources mémoires sur une puce DSP multi-noyaux, par Plourde,Frédéric.
    Hiver 2009

    Analysis of chip behavior in the presence of clock gating based on FPGA, par Honarmand,Jafar.
    Hiver 2020

    Signatures des circuits ASIC - approche pour détermination des pannes systématiques, par Dulipovici,Andrei.
    Été 2011

    Amélioration des méthodes d'émulation des pannes par les radiations cosmiques sur les FGPA, par Laouej,Mariem.
    Hiver 2020

    Fiabilité et robustesse aux radiations cosmiques des systèmes numériques embarqués dans les véhicules automobiles, par Hajji,Thaweb.
    Hiver 2020

    Adaptation de l'approche de test CDIDDQ aux circuits programmables FPGA, par Khaled,Haithem.
    Automne 2011

    En codirection avec : Savaria, Yvon
    Émulation et comparaison du mode test et du mode fonctionnel des circuits intégrés à horloges multiples, par Larche,Justine.
    Automne 2013

    En codirection avec : Gagnon, François
    Un système de communication OFDM à faible probabilité d'interception, par Bouanen,Marwen.
    Hiver 2013

    En codirection avec : Savaria, Yvon
    Interface de transducteurs intelligents tolérante aux pannes pour des applications avioniques critiques, par Bouanen,Safwen.
    Automne 2013

    En codirection avec : Gagnon, Ghyslain
    Amélioration de la technique de test et diagnostic CDIDDQ, par Renquinha Henri,Nik.
    Automne 2013

    En codirection avec : Gagnon, François
    Caractérisation et analyse des chemins critiques de circuits intégrés asynchrones complexes, par Têtu,Jean-François.
    Été 2014

    Nouvelle technique de test de type délai plus robuste à la variation d'impédance du réseau de distribution d'alimentation, par Louati,Ali.
    Été 2017

    Développement de bancs d'essais pour émulation et bombardement de particules, par Jacquet,Florian.
    Été 2017

    Amélioration du processus de testabilité des circuits intégrés asynchrones dérivés de la topologie de conception d'Octasic, par Lambert,Quentin.
    Automne 2019

Thèse de doctorat (recherche appliquée)

    En codirection avec : Boland, Jean-François
    Méthodologie de vérification automatique basée sur l'utilisation des tests structurels de transition avec insertion de registres à balayage, par Hobeika,Christelle.
    Automne 2011

    En codirection avec : Savaria, Yvon
    Mise en oeuvre et validation d'une méthodologie estimant la sensibilité des blocs d'entrée/sortie des FPGA à base de SRAM face aux radiations, par Tazi,Fatima Zahra.
    Été 2017

    En codirection avec : Velazco, Raoul
    Stratégies facilitant les tests en pré-certification pour la robustesse à l'égard des radiations, par Souari,Anis.
    Été 2016

    En codirection avec : Ait Mohamed, Otmane
    Integrating Specification and Test Requirements as Constraints in Verification Strategies for 2D and 3D Analog and Mixed Signal Designs, par Azizi,Najla.
    Été 2018

    Infrastructure de test définie par logiciel, par Pichette,Simon.
    Hiver 2020

    En codirection avec : Savaria, Yvon
    Réduction de la consommation énergétique d'un processeur ARM endochrone, par Benyoussef,Maryem.
    Automne 2019

Projet d'application à 15 crédits

    En codirection avec : Gagnon, François
    Implémentation matérielle, vérifications, estimation de performances de filtres numériques de signal conçue à l'aide d'algorithmes évolutionnaires, par Baallal,Tarek.
    Hiver 2011

    Stratégie de conception facilitant le test en vitesse des circuits imprimés, par Mnif,Zied.
    Hiver 2017

Publications
Compte rendu de conférence (105)

Maryem Benyoussef, Claude Thibeault, Yvon Savaria. 2019. « A prediction model for implementing DVS in single-rail bundled-data handshake-free asynchronous circuits ». 2019 IEEE International Symposium on Circuits and Systems (ISCAS) (Sapporo, Japan, May 26-29, 2019) Institute of Electrical and Electronics Engineers Inc..

Mickael Fiorentino, Claude Thibeault, Yvon Savaria, François Gagnon, Tom Awad, Doug Morrissey, Michel Laurence. 2019. « AnARM: a 28nm energy efficient ARM processor based on Octasic asynchronous technology ». 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) (Hirosaki, Japan, May 12-15, 2019) p. 58-59. Los Alamitos, CA, USA : IEEE Computer Society.

Omar Al-Terkawi Hasib, Daniel Crepeau, Thomas Awad, Andrei Dulipovici, Yvon Savaria, Claude Thibeault. 2018. « Exploiting built-in delay lines for applying launch-on-capture at-speed testing on self-timed circuits ». IEEE 36th VLSI Test Symposium (VTS) (San Francisco, CA, USA, Apr. 22-25, 2018) Los Alamitos, CA, USA : IEEE Computer Society.

Abdessamad Amrhar, Alireza Avakh Kisomi, Eric Zhang, Joe Zambrano, Claude Thibeault, René Jr. Landry. 2017. « Multi-mode reconfigurable software defined radio architecture for avionic radios ». Integrated Communications, Navigation and Surveillance Conference (ICNS) (Herndon, VA, USA, Apr. 18-20, 2017) p. 2D1/1-2D1/10. Piscataway, NJ, USA : IEEE.

Mickaël Fiorentino, Yvon Savaria, Claude Thibeault. 2017. « FPGA implementation of Token-based Self-timed processors: A case study ». 15th IEEE International New Circuits and Systems Conference (NEWCAS) (Strasbourg, France, June 25-28, 2017) p. 313-316. Piscataway, NJ, USA : IEEE.

Claude Thibeault, Ali Louati. 2017. « A new delay testing signal scheme robust to power distribution network impedance variation ». IEEE 35th VLSI Test Symposium (VTS) (Las Vegas, NV, USA,, Apr. 09-12, 2017) IEEE Computer Society.

Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Muller, Andreas Burg, Claude Thibeault, Warren J. Gross. 2016. « A multi-Gbps unrolled hardware list decoder for a systematic polar code ». 50th Asilomar Conference on Signals, Systems and Computers (Pacific Grove, CA, USA, Nov. 06-09, 2016) p. 1194-1198. Piscataway, NJ, USA : IEEE.

Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, Fan YouZhe, Tsui Chi-ying, Andreas Burg, Claude Thibeault, Warren J. Gross. 2016. « Hardware decoders for polar codes: An overview ». 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (Montréal, QC, Canada, May 22-25, 2016) Institute of Electrical and Electronics Engineers Inc..

Fatima Zahra Tazi, Claude Thibeault, Yvon Savaria. 2016. « Detailed analysis of radiation-induced delays on I/O blocks of an SRAM-based FPGA ». 2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (Vancouver, BC, Canada, May 15-18, 2016) Piscataway, NJ, USA : IEEE.

Seyyed Ali Hashemi, Alexios Balatsoukas-Stimming, Pascal Giard, Claude Thibeaul, Warren J. Gross. 2016. « Partitioned successive-cancellation list decoding of polar codes ». 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) (Shanghai, China, Marc. 20-25, 2016) p. 957-960. Piscataway, NJ, USA : IEEE.

Omar Al-Terkawi Hasib, Yvon Savaria, Claude Thibeault. 2016. « WeSPer: a flexible small delay defect quality metric ». 2016 IEEE 34th VLSI Test Symposium (VTS) (Las Vegas , NV, USA, Apr. 25-27, 2016) IEEE Computer Society.

Mickael Fiorentino, Yvon Savaria, Claude Thibeault, Pascal Gervais. 2016. « A practical design method for prototyping self-timed processors using FPGAs ». 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (Montréal, QC, Canada, May 22-25, 2016) p. 1754-1757. Piscataway, NJ, USA : IEEE.

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco. 2015. « An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs ». 2015 IEEE East-West Design & Test Symposium (EWDTS) (Batumi, GA, USA, Sept. 26-29, 2015) IEEE.

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco. 2015. « Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis ». 2015 IEEE 21st International On-Line Testing Symposium (IOLTS) (Halkidiki, Greece, July 6-8, 2015) p. 36-39. Piscataway, NJ, USA : IEEE.

Pascal Giard, Gabi Sarkis, Claude Thibeault, Warren J. Gross. 2015. « A 638 Mbps low-complexity rate 1/2 polar decoder on FPGAs ». 2015 IEEE Workshop on Signal Processing Systems (SiPS) (Hangzhou, China, Oct. 14-16, 2015) Piscataway, NJ, USA : IEEE.

Marc-André Léonard, Jean-François Boland, Christophe Jégo, Claude Thibeault. 2015. « Towards analysis of the radiation sensitivity of digital designs at high level of abstraction ». SAE 2015 AeroTech Congress & Exhibition (Seattle, WA, USA, Sept. 22-24, 2015) SAE International.

Mickael Fiorentino, Omar Al-Terkawi, Yvon Savaria, Claude Thibeault. 2015. « Self-timed circuits FPGA implementation flow ». 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS). Proceedings (Grenoble, France, June 7-10, 2015) Piscataway, NJ, USA : IEEE.

L. C. Trudeau, G. Gagnon, F. Gagnon, C. Thibeault, T. Awad, D. Morrissey. 2015. « A low-latency, energy-efficient L1 cache based on a self-timed pipeline ». 2015 21st IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) (Mountain View, CA, USA, May 4-6, 2015) p. 17-18. Los Alamitos, CA, USA : IEEE Computer Society.

G. Sarkis, P. Giard, A. Vardy, Claude Thibeault, W. J. Gross. 2014. « Increasing the speed of polar list decoders ». 2014 IEEE Workshop on Signal Processing Systems (SiPS) (Belfast, Ireland, Oct. 20-22, 2014) Piscataway, N. J., USA : IEEE.

A. Ghodbane, M. Saad, J.-F. Boland, C. Thibeault. 2014. « Applied cosmic rays fault accomodation in flight control systems using fault reconstruction based FDD and SMC reconfiguration ». ICMICE Prague 2014, International Conference on Modelling, Identification and Control Engineering (Preague, Czech Republic, July 7-8, 2014)

Azeddine Ghodbane, Maarouf Saad, Jean-François Boland, Claude Thibeault. 2014. « Sliding mode reconfigurable control for cosmic rays faults in flight systems ». ASME International Mechanical Engineering Congress and Exposition, Proceedings (IMECE) (Montreal, QC, Canada, Nov. 14-20, 2014) American Society of Mechanical Engineers (ASME).

P. Giard, G. Sarkis, Claude Thibeault, W. J. Gross. 2014. « Fast software polar decoders ». 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) (Florence, Italy, May 4-9, 2014) p. 7555-7559. Piscataway, N. J., USA : IEEE.

C. Hobeika, S. Pichette, M. A. Leonard, Claude Thibeault, Jean-François Boland, Y. Audet. 2014. « Multi-abstraction level signature generation and comparison based on radiation single event upset ». 2014 IEEE 20th International On-Line Testing Symposium (IOLTS) (Platja d'Aro, Girona, Spain, July 7-9, 2014) p. 212-215. Piscataway, N. J., USA : IEEE.

Khaza Anuarul Hoque, Otmane Ait Mohamed, Yvon Savaria, Claude Thibeault. 2014. « Early Analysis of Soft Error Effects for Aerospace Applications Using Probabilistic Model Checking ». Formal Techniques for Safety-Critical Systems - 2nd International Workshop, FTSCS 2013, Revised Selected Papers (Queenstown, New Zealand, Oct. 29-30, 2013) p. 54-70. Springer Verlag.

Khaza Anuarul Hoque, O. Ait Mohamed, Yvon Savaria, Claude Thibeault. 2014. « Probabilistic model checking based DAL analysis to optimize a combined TMR-blind-scrubbing mitigation technique for FPGA-based aerospace applications ». 2014 Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign (MEMOCODE) (Lausanne, Switzerland, Oct. 19-21, 2014) p. 175-184. Piscataway, N. J., USA : IEEE.

Taher Jalloul, Wessam Ajib, Omar A. Yeste-Ojeda, René Jr Landry, Claude Thibeault. 2014. « DME/DME navigation using a single low-cost SDR and sequential operation ». AIAA/IEEE Digital Avionics Systems Conference - Proceedings (Colorado Springs, CO, USA, Oct. 5-9, 2014) p. 3C21-23C29. Institute of Electrical and Electronics Engineers Inc..

G. Sarkis, P. Giard, Claude Thibeault, W. J. Gross. 2014. « Autogenerating software polar decoders ». 2014 IEEE Global Conference on Signal and Information Processing (GlobalSIP) (Atlanta, GA, USA, Dec. 3-5, 2014) p. 6-10. Piscataway, N. J., USA : IEEE.

Azeddine Ghodbane, Maarouf Saad, Jean-François Boland, Claude Thibeault. 2013. « Design of an actuator fault tolerant flight control system using fault detection and diagnosis ». SAE 2013 AeroTech Congress and Exhibition (AEROTECH) (Montreal, QC, Canada, Sept. 24-26, 2013) Warrendale, PA, USA : SAE International.

S. Bouanen, Claude Thibeault, Y. Savaria, J. P. Tremblay, Zhu Guchuan. 2013. « Fault tolerant smart transducer interfaces for safety-critical avionics applications ». 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) (East Syracuse, NY, USA, Oct. 5-10, 2013) Piscataway, N. J., USA : IEEE.

Georges Kaddoum, François-Dominique Richardson, Sarra Adouni, François Gagnon, Claude Thibeault. 2013. « Multi-user multi-carrier differential chaos shift keying communication system ». 2013 9th International Wireless Communications and Mobile Computing Conference, IWCMC 2013 (Cagliari, Sardinia, Italy, July 1-5, 2013) p. 1798-1802. Washington, D. C., USA : IEEE Computer Society.

R. Robache, Jean-François Boland, Claude Thibeault, Y. Savaria. 2013. « A methodology for system-level fault injection based on gate-level faulty behavior ». 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS) (Paris, France, June 16-19, 2013) Piscataway, N. J., USA : IEEE.

Z. El Alaoui Ismaili, F. Nabki, W. Ajib, Claude Thibeault. 2013. « A 0.35~6.25 GHz cognitive radio frequency synthesizer architecture ». 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) (Colombus, OH, USA, Aug. 4-7, 2013) p. 796-9. Piscataway, N. J., USA : IEEE.

J. P. Tremblay, Y. Savaria, Zhu Guchuan, Claude Thibeault, S. Bouanen. 2013. « A hardware prototype for integration, test and validation of avionic networks ». 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) (East Syracuse, NY, USA, Oct. 5-10, 2013) p. 2-5. Piscataway, N. J., USA : IEEE.

A. Ghodbane, Maarouf Saad, Jean-François Boland, Claude Thibeault. 2012. « Fault tolerant flight control system using emmae method and reconfiguration with sliding mode technique ». 25th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (Montreal, QC, Canada, April 29-May 2, 2012) Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Marwen Bouanen, François Gagnon, Georges Kaddoum, Denis Couillard, Claude Thibeault. 2012. « An LPI design for secure OFDM systems ». 2012 IEEE Military Communications Conference (MILCOM) (Orlando, FL, USA, Nov. 1, 2012) Piscataway, NJ : Institute of Electrical and Electronics Engineers Inc..

Pascal Giard, Georges Kaddoum, François Gagnon, Claude Thibeault. 2012. « FPGA implementation and evaluation of discrete-time chaotic generators circuits ». 38th Annual Conference on IEEE Industrial Electronics Society, IECON 2012 (Montreal, QC, Canada, Oct. 25-28, 2012) p. 3221-3224. Washington, DC : IEEE Computer Society.

François Leduc-Primeau, Alexandre J. Raymond, Pascal Giard, Kevin Cushon, Claude Thibeault, Warren J. Gross. 2012. « High-throughput LDPC decoding using the RHS algorithm ». 2012 Conference on Design and Architectures for Signal and Image Processing (DASIP) (Karlsruhe, Germany, Oct. 23-25, 2012) Piscataway, NJ : IEEE.

Sandra Irobi, Zaid Al-Ars, Said Hamdioui, Claude Thibeault. 2011. « Testing for parasitic memory effect in SRAMs ». 20th Asian Test Symposium (ATS) (New Delhi, India, Nov. 20-23, 2011) p. 407-412. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Marc Joliveau, Michel Gendreau, François Gagnon, Claude Thibeault. 2011. « Low complexity low power non-recursive digital filters with unconstrained topology ». 20th European Conference on Circuit Theory and Design (ECCTD) (Linkoping, Sweden, Aug. 29-31, 2011) p. 865-868. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Marc Joliveau, Pascal Giard, Michel Gendreau, François Gagnon, Claude Thibeault. 2011. « Design of low complexity multiplierless digital filters with optimized free structure using a population-based metaheuristic ». International Symposium on Signals, Circuits and Systems (ISSCS) (Iasi, Romania, June 30-July 1, 2011) p. 249-252. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Christelle Hobeika, Claude Thibeault, Jean-François Boland. 2010. « Illegal state extraction from Register Transfer Level ». 8th IEEE International NEWCAS Conference (NEWCAS) (Montreal, Canada, June 20-23, 2010) p. 245-248. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Ammar B. Kouki, I. Masri, François Gagnon, Claude Thibeault. 2010. « On the embedded vector RF measurements in frequency agile and reconfigurable front-ends ». 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS) (Hammamet, Tunisia, Mar. 23-25, 2010) p. 1-5. New York, NY, USA : Institute of Electrical and Electronics Engineers.

René Gagné, Jean Belzile, Claude Thibeault. 2009. « Asynchronous component implementation methodology for GALS design in FPGAs ». Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009) Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Sacha Atwal, François Gagnon, Claude Thibeault. 2009. « An LPI wireless communication system based on chaotic modulation ». IEEE Military Communications Conference (MILCOM) (Boston, MA, USA, Oct. 18-21, 2009) Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Inc..

D. Ayachi, Yvon Savaria, Claude Thibeault. 2009. « A configurable platform for MPSoCs based on application specific instruction set processors ». Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009) p. 388-391. New York, NY, USA : Institute of Electrical and Electronics Engineers.

Christelle Hobeika, Claude Thibeault, Jean-François Boland. 2009. « Automatic verification methodology based on structural test patterns ». Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009) p. 292-295. New York, NY, USA : Institute of Electrical and Electronics Engineers.

Claude Thibeault, Y. Hariri, Christelle Hobeika. 2009. « On captureless delay test points ». Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009) p. 280-283. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

M. El Mustapha Ait Yakoub, M. Sawan, Claude Thibeault. 2009. « A neuromimetic ultra low-power ADC for bio-sensing applications ». Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009) Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Yvon Savaria, Neguin Sahraii, Claude Thibeault, François Gagnon. 2008. « Modeling and Dynamic Scheduling of Turbo Decoding for a Homogeneous Multiprocessor Platform ». CMOS Emerging Technologies Workshop (Vancouver, BC, Canada, Aug. 5-7, 2008)

Christelle Hobeika, Claude Thibeault, Jean-François Boland. 2008. « Use of structural tests in RTL verification ». 1st Microsystems and Nanoelectronics Research Conference (MNRC) (Ottawa, Canada, Oct. 15, 2008) p. 133-136. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society.

Negin Sahraii, Yvon Savaria, Claude Thibeault, François Gagnon. 2008. « Scheduling of turbo decoding on a multiprocessor platform to manage its processing effort variability ». Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Montreal, Canada, June 22-25, 2008) p. 73-76. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

José-Philippe Tremblay, Yvon Savaria, Claude Thibeault, Maria Mbaye. 2008. « Improving resource utilization in an multiple asynchronous ALU DSP architecture ». 1st Microsystems and Nanoelectronics Research Conference (MNRC) (Ottawa, Canada, Oct. 15, 2008) p. 25-28. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society.

S. Futcha, Claude Thibeault, François Gagnon. 2007. « Predicting CPU requirements with variability equations of Zf-Sqrd and rake receiver in a DSP context ». IEEE Northeast Workshop on Circuits and Systems (NEWCAS) (Montreal, Canada, Aug. 5-8, 2007) p. 1209-1212. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Sandrine Futcha, Claude Thibeault, François Gagnon, Basile L. Agba. 2007. « Extraction of primitives from ZF-SQRD algorithm for a DSP platform ». Canadian Conference on Electrical and Computer Engineering (CCECE) (Vancouver, Canada, April 22-26, 2007) p. 1046-1049. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

René Gagné, Jean Belzile, Claude Thibeault. 2007. « Architecture for efficient GALS support in commercial FPGAs ». IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Montreal, QC, Canada, Aug. 5-8, 2007) p. 638-641. Piscataway, N.J. : Institute of Electrical and Electronics Engineers.

Claude Thibeault. 2007. « On a new outlier rejection technique ». IEEE VLSI Test Symposium (Berkeley, CA, USA, May 6-10, 2007) p. 97-103. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society.

A. Chureau, Y. Savaria, Jean-François Boland, Z. Zilic, Claude Thibeault, François Gagnon. 2006. « Building heterogeneous functional prototypes using articulated interfaces ». IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006) p. 137-140. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

C. Thibeault, D. Tremblay, Y. Hariri. 2006. « Redefining the role of functional testing ». IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006) p. 133-136. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Y. Hariri, Claude Thibeault. 2006. « Improving a 3 data-source diagnostic method ». IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006) p. 149-152. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

S. M. F. Dia, Claude Thibeault, François Gagnon. 2006. « A very high speed and efficient CIC decimation filter core ». IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006) p. 61-64. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Claude Thibeault. 2006. « Improving digital IC testing with analog circuits ». IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006) p. 285-288. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Jean-François Boland, Claude Thibeault, Z. Zilic. 2005. « Efficient multi-abstraction level functional verification methodology for DSP applications ». Global Signal Processing Expo and Conference (GSPx) (Santa Clara, CA, USA, Sept., 2004)

Jean-François Boland, Claude Thibeault, Zeljko Zilic. 2005. « Using Matlab and Simulink in a SystemC Verification Environment ». Proceedings of Design and Verification Conference (DVCon05) (San Jose, CA, USA, Feb. 14-16, 2005 )

P. Dumais, S Cormier, François Gagnon, Claude Thibeault. 2005. « On the implementation of a multi-equalizer ». IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 19-22, 2005) p. 287-290. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Claude Thibeault. 2005. « On the test quality evaluation of current testing techniques ». IEEE International Workshop on Current and Defect Based Testing (DBT) (Palm Springs, CA, USA, May 1, 2005) p. 16-22. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society.

Jean-François Boland, A. Chureau, Claude Thibeault, Yvon Savaria, François Gagnon, Z. Zilic. 2004. « An efficient methodology for design and verification of an equalizer for a software defined radio ». 2nd Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS) (Montreal, QC, Canada, June 20-23, 2004) p. 73-76. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Pierre-Paul Carpentier, Ammar B. Kouki, Claude Thibeault. 2004. « A flexible digital platform for real-time control of RF components with application to MIMO channel emulation ». Canadian Conference on Electrical and Computer Engineering (Niagara Falls, Canada, May 2-5, 2004) p. 665-668. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Pierre-Paul Carpentier, Gwenael Poitau, Ammar B. Kouki, Claude Thibeault. 2004. « An integrated digital platform for rapid evaluation of novel wireless architectures ». Fourth IEEE International Symposium on Signal Processing and Information Technology (Rome, Italy, Dec. 18-21, 2004) p. 148-151. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Marie-Eve Grandmaison, Jean Belzile, Claude Thibeault, François Gagnon. 2004. « Frequency domain filter using an accurate reconfigurable FFT/IFFT core ». 2nd Annual IEEE Northeast Workshop on Circuits and Systems (Montreal, Canada, June 20-23, 2004) p. 165-168. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Marie-Eve Grandmaison, Jean Belzile, Claude Thibeault, François Gagnon. 2004. « Reconfigurable and efficient FFT/IFFT architecture ». Canadian Conference on Electrical and Computer Engineering (Niagara Falls, Canada, May 2-5, 2004) p. 1115-1118. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Philippe Dumais, Mohamed L.. Ammari, François Gagnon, Claude Thibeault. 2004. « Multi-equalization a powerful adaptive filtering for time varying wireless channels ». IEEE 60th Vehicular Technology Conference (VTC) (Los Angeles, CA, USA, Sept. 26-29, 2004) p. 1744-1747. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Claude Thibeault. 2004. « On new current signatures and adaptive test technique combination ». 22nd IEEE VLSI Test Symposium (Napa Valley, CA, USA, Apr. 25-29, 2004) p. 59-64. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Claude Thibeault. 2004. « On the potential of flush delay for characterization and test optimization ». IEEE International Workshop on Current and Defect Based Testing (DBT) (Napa Valley, CA, USA, Apr. 25, 2004) p. 55-60. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Yassine Hariri, Claude Thibeault. 2003. « 3DSDM : a 3 data-source diagnostic method ». 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Boston, MA, USA, Nov. 3-5, 2003) p. 117-123. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Qiu Bing, Yvon Savaria, Lu Meng, Wang Chunyan, Claude Thibeault. 2002. « Yield modeling of a WSI telecom router architecture ». 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Vancouver, BC, Canada, Nov. 6-8, 2002) p. 314-321. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Claude Thibeault. 2002. « Speeding-up IDDQ measurements ». 20th IEEE VLSI Test Symposium (Monterey, CA, USA, Apr. 28-May 2, 2002) p. 295-301. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Naïm Batani, Claude Thibeault, Christian Gargour. 2001. « An efficient FPGA implementation of a pulse-shaping IIR filter ». Canadian Conference on Electrical and Computer Engineering (Toronto, Canada, May 13-16, 2001) p. 353-356. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Ginette Monte, Bernard Antaki, Serge Patenaude, Yvon Savaria, Claude Thibeault, Pieter Trouborst. 2001. « Tools for the characterization of bipolar CML testability ». 19th IEEE VLSI Test Symposium (VTS) (Marina Del Rey, CA, USA, Apr. 29-May 3, 2001) p. 388-395. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Claude Thibeault. 2000. « Efficient diagnosis of single/double bridging faults with Delta Iddq probabilistic signatures and Viterbi algorithm ». 18th IEEE VLSI Test Symposium (Montreal, Canada, Apr. 30-May 4, 2000) p. 431-438. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Claude Thibeault. 2000. « Improving Delta-IDDQ-based test methods ». International Test Conference (Atlantic City, NJ, USA, Oct. 3-5, 2000) p. 207-216. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Aminata Dia, Claude Thibeault, Christian Gargour, Jean Louis Houle. 1999. « On the use of wavelet analysis for IC testing ». Troisième conférence internationale sur l'automatisation industrielle, École de technologie supérieure, Montréal, 7-9 juin 1999 : actes de la conférence = Third International Conference on Industrial Automation, École de technologie supérieure, Montréal, (Montreal, Canada, June 7-9, 1999) p. 21/9-21/12. Montreal, Canada : International Associaion of Industrial Automation.

Claude Thibeault. 1999. « An histogram based procedure for current testing of active defects ». International Test Conference (Atlantic City, NJ, USA, Sept. 28-30, 1999) p. 714-723. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Claude Thibeault. 1999. « On the comparison of IDDQ and IDDQ testing ». 17th IEEE VLSI Test Symposium (Dana Point, CA, USA, Apr. 25-29, 1999) p. 143-150. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

E. Hosseinzadeh, Jean Belzile, Claude Thibeault. 1998. « VLSI implementation of a high speed second order sigma-delta modulator with high-performance integrators ». IEEE Canadian Conference on Electrical and Computer Engineering (Waterloo, Canada, May 24-28, 1998) p. 545-548. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

P. Longtin, J. M. Love, C. Thibeault. 1998. « FPGAs as a proof of concept toward ASICs: a case study ». Actes de conférence / Proceedings : Le 5e colloque canadien sur les circuits programmables (FPD'98) : The Fifth Canadian Workshop on Field-Programmable Devices (FPD'98) (Montréal, QC, Canada, June 7-10, 1998) p. 94-99.

Claude Thibeault. 1998. « Increasing current testing resolution ». IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Austin, TX, USA, Nov. 2-4, 1998) p. 126-134. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Claude Thibeault, L. Boisvert. 1998. « Can the current behavior of faulty and fault-free ICs and the impact on diagnosis ». IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Austin, TX, USA, Nov. 2-4, 1998) p. 202-210. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Claude Thibeault, L. Boisvert. 1998. « Diagnosis method based on Iddq probabilistic signatures : experimental results ». IEEE International Test Conference (Washington, DC, USA, Oct. 18-21, 1998) p. 1019-1026. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Yves Gagnon, Yvon Savaria, Michel Meunier, Claude Thibeault. 1997. « Are defect-tolerant circuits with redundancy really cost-effective? Complete and realistic cost model ». 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings (Paris, France, Oct. 20-22, 1997) p. 157-165. Piscataway, NJ, USA : IEEE.

Claude Thibeault. 1997. « A novel probabilistic approach for IC diagnosis based on differential quiescent current signatures ». 15th IEEE VLSI Test Symposium (Monterey, CA, USA, Apr. 27-May 1, 1997) p. 80-85. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

M. Kafrouni, Claude Thibeault, Yvon Savaria. 1997. « A cost model for VLSI/MCM systems ». IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Paris, France, Oct. 20-22, 1997) p. 148-156. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Claude Thibeault, A. Payeur. 1996. « Experimental results from I-DDF testing ». IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Boston, MA, USA, Nov. 6-8, 1996) p. 185-193. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.

Martin Alie, Jean Belzile, C.laude Thibeault. 1995. « Décodeur M-chemins avec calcul de métrique algébrique ». Canadian Conference on Electrical and Computer Engineering, 1995 (Montréal, QC, Canada, Sept. 5-8, 1995) p. 225-228. IEEE.

N. Batani, C. Thibeault, M. Laurence, Fred Awad. 1995. « A multifunction signal processing card with FPD's ». The 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) : technology, Tools and Applications : Proceedings (Montreal, QC, Canada, May 29-June 1, 1995) p. 179-184. École Polytechnique.

C. Thibeault. 1995. « Detection and location of embedded critical paths by signal processing of IDD ». Proceedings of the IEEE International Mixed Signal Testing Workshop (Grenoble, France, June 20-22, 1995) p. 228-232.

C. Thibeault, A. Payeur. 1995. « FFT-based test of a yield monitor circuit ». Proceedings, the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Lafayette, LA, USA, Nov. 13-15, 1995) p. 243-251. IEEE.

D. Jr. Crépeau, Claude Thibeault, François Gagnon, Naïm Batani, G. Bégin. 1995. « FPGA Implementation of a new decoder algorithm for convolutional codes ». Actes de conférence - le 3e Colloque Canadien sur les Circuits Intégrés Programmables (FPD'95) : technologie, outils et applications, Montréal, Québec, Canada, May 29 - June 1, 1995 the 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) = Procee (Montréal, QC, Canada, 29 mai-1 juin 1995) p. 70-74.

Claude Thibeault. 1995. « Detection and location of faults and defects using digital signal processing ». Proceedings 13th IEEE VLSI Test Symposium (Los Alamitos, CA, USA, Apr. 30-May 3, 1995) p. 262-267. IEEE Computer Society Press.

Claude Thibeault, François Gagnon. 1995. « Design experience from system level to FPGAs ». Actes de conférence - le 3e Colloque Canadien sur les Circuits Intégrés Programmables (FPD'95) : technologie, outils et applications, Montréal, Québec, Canada, May 29 - June 1, 1995 the 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) = Procee (Montréal, QC, Canada, 29 mai-1 juin 1995) p. 162-167.

Guy Bégin, Claude Thibeault. 1994. « A connectivity based, table-driven decoder for convolutional codes ». 1994 IEEE International Symposium on Information Theory, 1994. Proceedings (Trondheim, Norway, June 27-July 1, 1994) p. 166. IEEE.

Claude Thibeault. 1994. « Using Fourier analyses to enhance IC testability ». IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Los Alamitos, CA, USA, Oct. 17-19, 1994) p. 280-288. IEEE Computer Society Press.

Claude Thibeault. 1994. « Using sinusoidal stimuli and Fourier analyses for memory IC testing ». IEEE International Workshop on Memory Technology, Design and Testing (San Jose, CA, USA, Aug. 8-9, 1994) p. 92-97. Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.

Y. Savaria, Claude Thibeault. 1993. « An inexpensive method of testing localized parametric defects in static RAM ». Records of the 1993 IEEE International workshop on memory testing (San Jose, CA, USA, Aug. 9-10, 1993) p. 90-95. Institute of Electrical and Electronics Engineers.

J. Crépeau, Claude Thibeault, Y. Savaria. 1993. « Some results on yield and local design rule relaxation ». Proceedings. The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Venice, Italy, Oct. 27-29, 1993) p. 144-151. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers (IEEE).

Claude Thibeault, Y. Savaria. 1992. « Comparing results from defect-tolerant yield models ». Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Dallas, TX, USA, Nov. 4-6, 1992) p. 22-31. Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers (IEEE).

Article publié dans une revue, révisé par les pairs (38)

Mostafa Darvishi, Yves Audet, Yves Blaquière, Claude Thibeault, Simon Pichette. 2019. « On the susceptibility of SRAM-based FPGA routing network to delay changes induced by ionizing radiation ». IEEE Transactions on Nuclear Science. vol. 66 , nº 3. p. 643-654.

Pascal Giard, Alexios Balatsoukas-Stimming, Gabi Sarkis, Claude Thibeault, Warren J. Gross. 2018. « Fast low-complexity decoders for low-rate polar codes ». Journal of Signal Processing Systems. vol. 90 , nº 5. p. 675-685.

Pascal Giard, Gabi Sarkis, Camille Leroux, Claude Thibeault, Warren J. Gross. 2018. « Low-latency software polar decoders ». Journal of Signal Processing Systems. vol. 90 , nº 5. p. 761-775.

Claude Thibeault, Ghyslain Gagnon. 2018. « On the analysis and the mitigation of power supply noise and power distribution network impedance variation for scan-based delay testing techniques ». IEEE Transactions on Very Large Scale Integration (VLSI) Systems. vol. 26 , nº 7. p. 1377-1390.

Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Muller, Andrea Bonetti, Claude Thibeault, Warren J. Gross, Philippe Flatresse, Andreas Burg. 2017. « PolarBear: A 28 nm FD-SOI ASIC for decoding of polar codes ». IEEE Journal on Emerging and Selected Topics in Circuits and Systems. vol. 7 , nº 4. 13 p. p. 616-629.

Gabi Sarkis, Pascal Giard, Alexander Vardy, Claude Thibeault, Warren J. Gross. 2016. « Fast list decoders for polar codes ». IEEE Journal on Selected Areas in Communications. vol. 34 , nº 2. p. 318-328.

Gabi Sarkis, Ido Tal, Pascal Giard, Alexander Vardy, Claude Thibeault, Warren J. Gross. 2016. « Flexible and low-complexity encoding and decoding of systematic polar codes ». IEEE Transactions on Communications. vol. 64 , nº 7. p. 2732-2745.

A. Ghodbane, M. Saad, C. Hobeika, J. F. Boland, C. Thibeault. 2016. « Design of a tolerant flight control system in response to multiple actuator control signal faults induced by cosmic rays ». IEEE Transactions on Aerospace and Electronic Systems. vol. 52 , nº 2. p. 681-697.

Anis Souari, Claude Thibeault, Yves Blaquiere, Raoul Velazco. 2016. « Towards an efficient SEU effects emulation on SRAM-based FPGAs ». Microelectronics Reliability. vol. 66 p. 173-182.

Pascal Giard, Gabi Sarkis, Claude Thibeault, Warren J. Gross. 2016. « Multi-mode unrolled architectures for polar decoders ». IEEE Transactions on Circuits and Systems I: Regular Papers. vol. 63 , nº 9. p. 1443-1453.

P. Giard, G. Sarkis, Claude Thibeault, W. J. Gross. 2015. « 237 Gbit/s unrolled hardware polar decoder ». Electronics Letters. vol. 51 , nº 10. p. 762-763.

Christelle Hobeika, Claude Thibeault, Jean-François Boland. 2015. « Functional constraint extraction from register transfer level for ATPG ». IEEE Transactions on Very Large Scale Integration (VLSI) Systems. vol. 23 , nº 2. p. 407-412.

G. Sarkis, P. Giard, A. Vardy, Claude Thibeault, W. J. Gross. 2014. « Fast Polar Decoders: Algorithm and Implementation ». IEEE Journal on Selected Areas in Communications. vol. 32 , nº 5. p. 946-957.

A Ghodbane, Maarouf Saad, Jean-François Boland, Claude Thibeault. 2014. « Applied actuator fault accommodation in flight control systems using fault reconstruction based FDD and SMC reconfiguration ». International Journal of Computer, Information, Systems and Control Engineering. vol. 8 , nº 7. p. 1044-1049.

F. Z. Tazi, Claude Thibeault, Y. Savaria, S. Pichette, Y. Audet. 2014. « On extra delays affecting I/O blocks of an SRAM-based FPGA due to ionizing radiation ». IEEE Transactions on Nuclear Science. vol. 61 , nº 6. p. 3138-3145.

Mostafa Darvishi, Yves Audet, Yves Blaquière, Claude Thibeault, Simon Pichette, Fatima Zahra Tazi. 2014. « Circuit level modeling of extra combinational delays in SRAM-based FPGAs due to transient ionizing radiation ». IEEE Transactions on Nuclear Science. vol. 61 , nº 6. p. 3535-3542.

Christelle Hobeika, Simon Pichette, Azeddine Ghodbane, Claude Thibeault, Yves Audet, Jean-François Boland, Maarouf Saad. 2013. « Flight Control Fault Models Based on SEU Emulation ». SAE International Journal of Aerospace. vol. 6 , nº 2.

Claude Thibeault, Y. Hariri, S. R. Hasan, C. Hobeika, Y. Savaria, Y. Audet, F. Z. Tazi. 2013. « A library-based early soft error sensitivity analysis technique for SRAM-based FPGA design ». Journal of Electronic Testing: Theory and Applications. vol. 29 , nº 4. p. 457-471.

C. Thibeault, Y. Hariri, C. Hobeika. 2012. « Tester memory requirements and test application time reduction for delay faults with Digital Captureless test Sensors ». Journal of Electronic Testing. vol. 28 , nº 2. p. 229-242.

Claude Thibeault, Simon Pichette, Yves Audet, Yvon Savaria, H. Rufenacht, E. Gloutnay, Yves Blaquière, F. Moupfouma, Naïm Batani. 2012. « On extra combinational delays in SRAM FPGAs due to transient ionizing radiations ». IEEE Transactions on Nuclear Science. vol. 59 , nº 6. p. 2959-2965.

Jose-Philippe Tremblay, Yvon Savaria, Guchuan Zhu, Claude Thibeault, Safwen Bouanen. 2012. « A System Architecture for Smart Sensors Integration in Avionics Applications ». SAE International Journal of Aerospace. vol. 5 , nº 1. p. 189-195.

Davide Trentin, Yvon Savaria, Guchuan Zhu, Claude Thibeault. 2012. « An AFDX Switch Fabric Hardware Core for Avionic Network Prototyping and Characterization ». SAE International Journal of Aerospace. vol. 5 , nº 1. p. 181-188.

Charles Despins, Fabrice Labeau, Tho Le Ngoc, Richard Labelle, Mohamed Cheriet, Claude Thibeault, François Gagnon, Alberto Leon-Garcia, Omar Cherkaoui, Bill St. Arnaud, Jacques McNeill, Yves Lemieux, Mathieu Lemay. 2011. « Leveraging green communications for carbon emission reductions : techniques, testbeds and emerging carbon footprint standards ». IEEE Communications Magazine. vol. 49 , nº 8. p. 101-109.

Claude Thibeault, Yassine Hariri. 2011. « C Delta IDDQ : improving current-based testing and diagnosis through modified test pattern generation ». IEEE Transactions on Very Large Scale Integration (VlSI) Systems. vol. 19 , nº 1. p. 130-141.

René Gagné, Jean Belzile, Claude Thibeault. 2009. « From synchronous to GALS : a new architecture for FPGAs ». Microelectronics Journal. vol. 40 , nº 11. p. 1657-1666.

Y. Hariri, Claude Thibeault. 2007. « Bridging fault diagnostic tool based on DIDDQ probabilistic signatures, circuit layout parasitics and logic errors ». IET Computers and Digital Techniques. vol. 1 , nº 6. p. 694-705.

Claude Thibeault. 2003. « On faster IDDQ measurements ». Journal of Electronic Testing. vol. 19 , nº 6. p. 625-635.

Claude Thibeault. 2003. « Replacing IDDQ testing: with variance reduction ». Journal of Electronic Testing. vol. 19 , nº 3. p. 325-340.

Claude Thibeault. 2000. « Diagnosis method using IDDQ probabilistic signatures : theory and results ». Journal of Electronic Testing. vol. 16 , nº 4. p. 339-353.

Claude Thibeault. 2000. « On the adaptation of Viterbi algorithm for diagnosis of multiple bridging faults ». IEEE Transactions on Computers. vol. 49 , nº 6. p. 575-587.

Claude Thibeault, Guy Begin. 1999. « Scan-based configurable, programmable, and scalable architecture for sliding window-based operations ». IEEE Transactions on Computers. vol. 48 , nº 6. p. 615-627.

Yves Gagnon, Yvon Savaria, Mathieu Meunier, Claude Thibeault. 1997. « Are defected-tolerant circuits with redundancy really cost-effective? ». Journal of Microelectronic Systems Integration. vol. 5 , nº 4. p. 199-208.

Yvon Savaria, Claude Thibeault, Andre Ivanov. 1996. « IEEE VLSI Test Symposium : meeting the quality challenge ». IEEE Design & Test of Computers. vol. 13 , nº 4. p. 110-112.

Claude Thibeault. 1995. « Using fourier analyses to enhance IC testability ». Journal of Microelectronic Systems Integration. vol. 3 , nº 2. p. 83-96.

Claude Thibeault, Yvon Savaria, Jean louis Houle. 1995. « Equivalence proofs of some yield modeling methods for defect-tolerant integrated circuits ». IEEE Transactions on Computers. vol. 44 , nº 5. p. 724-728.

Claude Thibeault, Yvon Savaria, Jean louis Houle. 1994. « A fast method to evaluate the optimum number of spares in defect-tolerant integrated-circuits ». IEEE Transactions on Computers. vol. 43 , nº 6. p. 687-697.

Claude Thibeault, Yvon Savaria, J. L. Houle. 1992. « Heuristic prediction of the optimum number of spares in defect-tolerant integrated circuits ». Journal of Circuits, Systems and Computers. vol. 2 , nº 2. p. 81-100.

Claude Thibeault, Yvon Savaria, Jean louis Houle. 1992. « Test quality of hierarchical defect-tolerant integrated circuits ». Journal of Electronic Testing. vol. 3 , nº 1. p. 93-102.

Livre (1)

Pascal Giard, Claude Thibeault, Warren J. Gross. 2017. « High-speed decoders for polar codes ». Springer. 98 p.

Chapitre de livre (1)

Donavan Prieur, Éric Granger, Yvon Savaria, Claude Thibeault. 2016. « Efficient identification of faces in video streams using low-power multi-core devices ». In Handbook of Pattern Recognition and Computer Vision . 5th ed.. p. 427-454. World Scientific.

Affiche (4)

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco. 2014. « Towards a realistic SEU effects emulation on SRAM based FPGAs ». Affiche présentée lors de la conférence : IEEE Nuclear and space radiation effects (NRSEC) ( Paris, France, July 14-18, 2014 )

M. Darvishi, Y. Audet, Y. Blaquière, C. Thibeault. 2014. « Circuit level modeling of extra combinational delays in SRAM FPGAs due to transient ionizing radiation ». Affiche présentée lors de la conférence : IEEE Nuclear and Space Radiation Effects Conference ( Paris, France, July 14-18, 2014 )

C. Thibeault, S. Pichette, Y. Audet, Y. Savaria, H. Rufenacht, E. Gloutnay, Et all. 2012. « Méthodologie de conception, vérification, et test des systèmes embarqués tolérants aux radiations ». Affiche présentée lors de la conférence : AVIO403 Journée CRIAQ : Destination 2022 ( ,  )

Christelle Hobeika, Claude Thibeault, Jean-François Boland. 2009. « Automatic verification methodology based on structural test patterns ». Affiche présentée lors de la conférence : 27th VLSI Test Symposium (IEEE VTS) ( Santa Cruz, Calif., USA, May 3-7, 2009 )

Communication (8)

S. Bouanen, Claude Thibeault, Y. Savaria, J. P. Tremblay, Zhu Guchuan. 2013. « Fault tolerant smart transducer interfaces for safety-critical avionics applications ». Communication lors de la conférence : 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) ( East Syracuse, NY, USA, Oct. 5-10, 2013 )

J. P. Tremblay, Y. Savaria, Zhu Guchuan, Claude Thibeault, S. Bouanen. 2013. « A hardware prototype for integration, test and validation of avionic networks ». Communication lors de la conférence : 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) ( East Syracuse, NY, USA, Oct. 5-10, 2013 )

C. Thibeault, S. Pichette, Y. Audet, Y. Savaria, H. Rufenacht, E. Gloutnay, et al.. 2012. « On extra combinational delays in SRAM FPGAs due to radiations ». Communication lors de la conférence : IEEE Nuclear and Space Radiation Effects Conference ( Miami, FL, USA, July 16-20, 2012 )

R. Gagné, Jean Belzile, Claude Thibeault. 2007. « Architecture for efficient GALS support in commercial FPGAs ». Communication lors de la conférence : IEEE North-East Workshop on Circuits and Systems (NEWCAS) ( Montreal, QC, Canada, Aug. 5-8, 2007 )

M.-E. Grandmaison, Jean Belzile, Claude Thibeault, François Gagnon. 2004. « Reconfigurable and efficient FFT/IFFT architecture ». Communication lors de la conférence : Canadian Conference on Electrical and Computer Engineering 2004 (CCECE 04) ( Niagara Falls, ON, Canada, May 2-5, 2004 )

P. Dumais, M.L. Ammari, François Gagnon, Claude Thibeault. 2004. « Multi-equalization a powerful adaptive filtering for time varying wireless channel ». Communication lors de la conférence : IEEE Vehicular Technology Conference ( Los Angeles, CA, USA, Sept., 2004 )

Claude Thibeault. 1996. « A successful industry-university collaboration ». Communication lors de la conférence : Open House 1996 ( Montréal, QC, Canada, Apr., 1996 )

G. Bégin, Claude Thibeault. 1994. « Un nouvel algorithme de décodage pour les codes convolutionnels ». Communication lors de la conférence : 62e Congrès de l'ACFAS ( Montréal, QC, Canada, 16-20 mai 1994 )

Brevet (10)

Nicholas Routhier, Claude Thibeault, Jean Belzile, Daniel Malouin, Pierre-Paul Carpentier, Martin Dallaire. 2010-11-30. « Process and system for encoding and playback of stereoscopic video sequences ».

Nicholas Routhier, Claude Thibeault, Jean Belzile, Daniel Malouin, Pierre-Paul Carpentier, Martin Dallaire. 2010-08-25. « Process and system for encoding and playback of stereoscopic video sequences ».

François Gagnon, Yvon Savaria, Philippe Dumais, Mohamed Lassaad Ammari, Claude Thibeault. 2010-04-06. « Multi-equalization method and apparatus ».

Karl Fecteau, Claude Thibeault, Yvon Savaria, Yves Blaquière, Jean-Jacques Laurin, Zhong-Fang Jin. 2009-10-27. « Methods, apparatus, and systems for reducing interference on nearby conductors  ».

Jean Belzile, Claude Thibeault, François Gagnon, Naïm K. Batani. 2007-10-16. « Method and apparatus for testing a device in an electronic component ».

François Gagnon, Claude Thibeault, Jean Belzile. 2006-12-19. « Parallelized infinite impulse response (IIR) and integrator filters ».

Claude Thibeault. 2005-11-08. « Integrated circuit testing system and method ».

Yvon Savaria, Meng Lu, Claude Thibeault. 2005-02-22. « Method of generating large scale signal paths in a parallel processing system ».

Jean Belzile, Claude Thibeault. 2004-10-05. « Data driven clocking ».

Guy Bégin, Claude Thibeault. 1997-10-28. « Method and apparatus for correcting and decoding a sequence of branches representing encoded data bits into estimated information bits ».

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