Design-Space Exploration for Error-Correction Solutions
Context
Error-correction coding is a critical component of modern communication and storage systems, enabling the detection and correction of data corruption. There are numerous families of error-correcting codes (e.g., Hamming, Reed-Solomon, Turbo, LDPC, Polar), each offering distinct advantages. Each code family may allow multiple decoding algorithms, which can in turn be implemented with different hardware architectures, schedules, quantization schemes, and technology nodes. This results in an immense design space where finding the solution that best meets application requirements is a complex and challenging task.
Design-space exploration (DSE) offers a systematic approach to navigate this complexity by evaluating and optimizing various decoding algorithms and hardware configurations. However, automating DSE specifically for error correction, where the best candidates are identified by evaluating key performance indicators (KPIs) across multiple abstraction levels, remains an open challenge.
This project is part of an NSERC Discovery research program whose long-term objective is to create an open ecosystem for the design-space exploration of error-correction solutions, enabling the informed selection of a code along with the decoding algorithm and hardware architecture, all the way down to the autogeneration of the associated circuits. Furthermore, this program involves collaborations with Prof. François Leduc-Primeau (Polytechnique Montréal), Prof. Camille Leroux (Bordeaux INP, France), and Prof. Stefan Weithoffer (IMT Atlantique, France). Depending on the research direction and the student’s interests, opportunities for co-supervision, close collaboration, or international research stays may be available.
Project Objectives
The primary objective of this project is to investigate, design, and develop the foundations for design-space exploration
tailored to error correction. More specifically, the project aims to:
- Conduct an in-depth analysis of error-correction techniques, identifying KPIs for various applications, code families, decoding algorithms, and hardware implementations.
- Design and develop a modular DSE framework specific to error correction, separating components such as codes and their design constraints, compiler and KPI estimation, visualization tools, and optimization algorithms.
- Research the creation of domain-specific intermediate representations (IRs) capable of capturing the design space, including data dependencies, resource allocation, and scheduling information.
- Design a compiler that translates user inputs (e.g., code family, code parameters, decoding algorithms) into models represented in these IRs, with support for multiple code families.
- Incorporate constraint-handling mechanisms to allow users to specify hard and soft constraints, explore trade-offs, and conduct multi-objective optimization.
Required knowledge
Desired Profile
- Student in electrical engineering, computer engineering, or a closely related field.
- Solid background in error-correction coding (e.g., LDPC, Polar, Turbo codes) or digital communications.
- Strong programming skills.
- Interest in compiler design, algorithm development, and optimization techniques.
- Interest in hardware design and implementation is desirable.
The following skills are considered assets:
- Experience with DSE tools or frameworks.
- Experience with hardware description languages, e.g., VHDL or Verilog.
- Familiarity with multi-objective optimization methods.
- Prior experience with tools such as AFF3CT or similar error-correction simulation platforms.