Yves Blaquière

• Co-directed by: Blaquière, Yves
  High Power MEMS Swithes for Avionic Application, by Shuaibu,Abdurrashid Hassan.
  Summer 2023
  
• Co-directed by: Savaria, Yvon
  Méthodes d’instrumentation et d’optimisation d’applications élaborées en OpenCL mises en oeuvre sur des plateformes hétérogènes reconfigurables, by Bensalem,Hachem.
  Fall 2021
  
• Co-directed by: Constantin, Nicolas
  Management of Electrical and Thermomechanical Constraints in High Density Reconfigurable Power Systems, by Nobert,Gabriel.
  Summer 2023
  
• Co-directed by: Nabki, Frédéric
  Compact Heterogeneous High-density System-in-Package Techniques for Avionic Systems, by Sadrimanesh,Hamid.
  Summer 2023
  
• Co-directed by: Granger, Éric
  Infrastructure for Automatic Optimization of Applications on Heterogeneous FPGA-Based Computing Platforms, by Taghipour,Pouya.
  Summer 2023
  

• Co-directed by: Christmann, Jean-Frédéric
  Architecture de contrôle asynchrone pour les calculs complexes en mémoire, by Remars,Matthias.
  Summer 2021
  
• Co-directed by: Bocquier, Robert
  Conception d'un synthétiseur hybride, polyphonique et économique, by Baum,Loïc.
  Winter 2021
  

Hachem Bensalem, Yves Blaquiere, Yvon Savaria. 2022. « An efficient OpenCL-Based implementation of a SHA-3 co-processor on an FPGA-centric platform ». IEEE Transactions on Circuits and Systems II: Express Briefs. (In press)

Safa Berrima, Yves Blaquière, Yvon Savaria. 2021. « Ring-oscillator based high accuracy low complexity multichannel time-to-digital converter architecture for field-programmable gate arrays ». IEEE Transactions on Instrumentation and Measurement. vol. 70 10 p.

Van Ha Nguyen, Nam Ly, Abdul Hafiz Alameh, Yves Blaquière, Glenn Cowan. 2021. « A versatile 200-V capacitor coupled level shifter for fully floating multi MHz gate drivers ». IEEE Transactions on Circuits and Systems II: Express Briefs. vol. 68 , nº 5. p. 1625-1629.

Hachem Bensalem, Yves Blaquière, Yvon Savaria. 2020. « In-FPGA instrumentation framework for OpenCL-Based designs ». IEEE Access. vol. 8 p. 212979-212994.

Safa Berrima, Yves Blaquière, Yvon Savaria. 2020. « Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA ». IET Circuits, Devices and Systems. vol. 14 , nº 8. p. 1243-1252.

Mostafa Darvishi, Yves Audet, Yves Blaquière, Claude Thibeault, Simon Pichette. 2019. « On the susceptibility of SRAM-based FPGA routing network to delay changes induced by ionizing radiation ». IEEE Transactions on Nuclear Science. vol. 66 , nº 3. p. 643-654.

Nicolas Laflamme-Mayer, Gilbert Kowarzyk, Yves Blaquière, Yvon Savaria, Mohamad Sawan. 2019. « A defect-tolerant reusable network of DACs for wafer-scale integration ». IEEE Transactions on Very Large Scale Integration (VLSI) Systems. vol. 27 , nº 2. p. 304-315.

Safa Berrima, Yves Blaquière, Yvon Savaria. 2018. « Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits ». Integration. vol. 62 11 p. p. 159-169.

Mostafa Darvishi, Yves Audet, Yves Blaquière. 2018. « Delay monitor circuit and delay change measurement due to SEU in SRAM-based FPGA ». IEEE Transactions on Nuclear Science. vol. 65 , nº 5. p. 1153-1160.

Etienne Lepercq, Yves Blaquière, Yvon Savaria. 2018. « A pattern-based routing algorithm for a novel electronic system prototyping platform ». Integration. vol. 62 p. 224-237.

Wasim Hussain, Hussein Fakhoury, Patricia Desgreys, Yves Blaquière, Yvon Savaria. 2016. « An asynchronous delta-modulator based A/D converter for an electronic system prototyping platform ». IEEE Transactions on Circuits and Systems I: Regular Papers. vol. 63 , nº 6. p. 751-762.

Wasim Hussain, Olivier Valorge, Yves Blaquière, Yvon Savaria. 2016. « A novel spatially configurable differential interface for an electronic system prototyping platform ». Integration, the VLSI Journal. vol. 55 p. 129-137.

Anis Souari, Claude Thibeault, Yves Blaquiere, Raoul Velazco. 2016. « Towards an efficient SEU effects emulation on SRAM-based FPGAs ». Microelectronics Reliability. vol. 66 p. 173-182.

Wasim Hussain, Yves Blaquière, Yvon Savaria. 2015. « An interface for open-drain bidirectional communication in field programmable interconnection networks ». IEEE Transactions on Circuits and Systems I: Regular Papers. vol. 62 , nº 10. p. 2465-2475.

Nicolas Laflamme-Mayer, Yves Blaquière, Mohamad Sawan. 2015. « A configurable analog buffer dedicated to a wafer-scale prototyping platform ». Analog Integrated Circuits and Signal Processing. vol. 82 , nº 1. p. 57-66.

Mostafa Darvishi, Yves Audet, Yves Blaquière, Claude Thibeault, Simon Pichette, Fatima Zahra Tazi. 2014. « Circuit level modeling of extra combinational delays in SRAM-based FPGAs due to transient ionizing radiation ». IEEE Transactions on Nuclear Science. vol. 61 , nº 6. p. 3535-3542.

Nicolas Laflamme-Mayer, Yves Blaquière, Yvon Savaria, Mohamad Sawan. 2014. « A configurable multi-rail power and I/O pad applied to wafer-scale systems ». IEEE Transactions on Circuits and Systems I: Regular Papers. vol. 61 , nº 11. p. 3135-3144.

Mamadou Diobet Diop, Moufid Radji, Anas A. Hamoui, Yves Blaquière, Ricardo Izquierdo. 2013. « Evaluation of anisotropic conductive films based on vertical fibers for post-CMOS wafer-level packaging ». IEEE Transactions on Components, Packaging and Manufacturing Technology. vol. 3 , nº 4. p. 581-591.

Nicolas Laflamme-Mayer, Walder Andre, Olivier Valorge, Yves Blaquière, Mohamad Sawan. 2013. « Configurable input-output power pad for wafer-scale microelectronic systems ». IEEE Transactions on Very Large Scale Integration (VLSI) Systems. vol. 21 , nº 11. p. 2024-2033.

Claude Thibeault, Simon Pichette, Yves Audet, Yvon Savaria, H. Rufenacht, E. Gloutnay, Yves Blaquière, F. Moupfouma, Naïm Batani. 2012. « On extra combinational delays in SRAM FPGAs due to transient ionizing radiations ». IEEE Transactions on Nuclear Science. vol. 59 , nº 6. p. 2959-2965.

E. Granger, Y. Savaria, Y. Blaquière, M.-A. Cantin, P. Lavoie. 1997. « A VLSI architecture for fast clustering with the fuzzy ART neural network ». Journal of Microelectronic Systems Integration. vol. 5 , nº 1. p. 3-18.

Yves Blaquière, Michel Dagenais, Yvon Savaria. 1996. « Timing analysis speed-up using a hierarchical and a multimode approach ». IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. vol. 15 , nº 2. p. 244-255.

Yves Blaquière, Gabriel Gagné, Yvon Savaria, Claude Évéquoz. 1995. « A new efficient algorithmic-based SEU tolerant system architecture ». IEEE Transactions on Nuclear Science. vol. 42 , nº 6 pt 1. p. 1599-1606.

Yves Blaquière, Jacob Davidson. 1990. « VHDL design of a priority interrupt controller and synchronizer for the MC68008 ». Microprocessors and Microsystems. vol. 14 , nº 7. p. 474-478.

Yves Blaquière, Yvon Savaria. 1987. « Area overhead analysis of SEF: A design methodology for tolerating SEU ». IEEE Transactions on Nuclear Science. vol. 34 , nº 6 pt. 1. p. 1481-1486.

Van Ha Nguyen, Nueraimaiti Aimaier, Gabriel Nobert, Tan Pham, Nicolas Constantin, Yves Blaquiere, Glenn Cowan. 2022. « A reconfigurable power system-in-package module using GaN HEMTs and IC bare dies on LTCC substrate: Design - implementation - experiment and future directions ». 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022) p. 188-192. IEEE.

Van Ha Nguyen, Xuan-Dien Do, Yves Blaquiere, Glenn Cowan. 2022. « Multi-phase hybrid boost converter with high conduction loss reduction and fast dynamic response for automotive applications ». 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022) p. 183-187. IEEE.

Van Ha Nguyen, Xuen-Dien Do, Yves Blaquiere, Glenn Cowan. 2022. « A 3.3 V 0.1-1 a hybrid buck-boost converter with 85-97 % power efficiency range highly-suited for battery-powered devices using low-profile high-DCR inductor ». 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022) p. 303-307. IEEE.

Abdurrashid Hassan Shuaibu, Frederic Nabki, Yves Blaquiere. 2022. « A MEMS electrothermal actuator designed for a DC switch aimed at power switching applications and high voltage resilience ». 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022) p. 317-321. IEEE.

Nueraimaiti Aimaier, Nam Ly, Gabriel Nobert, Yves Blaquière, Nicolas Constantin, Glenn Cowan. 2021. « SHEPWM Class-D amplifier with a reconfigurable gate driver integrated circuit ». IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021) Institute of Electrical and Electronics Engineers.

Hachem Bensalem, Yves Blaquière, Yvon Savaria. 2021. « Acceleration of the secure hash algorithm-256 (SHA-256) on an FPGA-CPU cluster using OpenCL ». IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021) Institute of Electrical and Electronics Engineers.

Van Ha Nguyen, Abdul Hafiz Alameh, Nam Ly, Yves Blaquière, Glenn Cowan. 2021. « A novel minimum-phase dual-inductor hybrid boost converter with PWM voltage-mode controller ». IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021) Institute of Electrical and Electronics Engineers.

Van Ha Nguyen, Nam Ly, Abdul Hafiz Alameh, Yves Blaquière, Glenn Cowan. 2021. « Compact and low-power under-voltage lockout and thermal-shutdown protection circuits using a novel Low-IQ all-in-one bandgap comparator ». IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021) IEEE.

Gabriel Nobert, Abdul-Hafiz Alameh, Nam Ly, Nicolas G. Constantin, Yves Blaquière. 2021. « Towards an LTCC SiP for control system in safety-critical applications ». IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021) Institute of Electrical and Electronics Engineers.

Nam Ly, Nueraimaiti Aimaier, Abdul Hafiz Alameh, Yves Blaquière, Glenn Cowan, Nicolas G. Constantin. 2020. « A high voltage multi-purpose on-the-fly reconfigurable half-bridge gate driver for GaN HEMTs in 0.18-mum HV SOI CMOS technology ». 18th IEEE International New Circuits and Systems Conference (NEWCAS) (Montréal, QC, Canada, June 16-19, 2020) p. 178-181. Piscataway, NJ, USA : IEEE.

Hachem Bensalem, Yves Blaquière, Yvon Savaria. 2019. « Toward in-system monitoring of OpenCL-based designs on FPGA ». IEEE International Symposium on Circuits and Systems (ISCAS) (Sapporo, Japan, May 26-29, 2019) Institute of Electrical and Electronics Engineers Inc..

Safa Berrima, Yves Blaquière, Yvon Savaria. 2017. « A multi-measurements RO-TDC implemented in a Xilinx field programmable gate array ». 2017 IEEE International Symposium on Circuits and Systems (ISCAS) (Baltimore, MD, USA, May 28-31, 2017) Piscataway, NJ, USA : IEEE.

Safa Berrima, Yves Blaquière, Yvon Savaria. 2017. « Sub-ps resolution programmable delays implemented in a Xilinx FPGA ». IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (Boston, MA, USA, Aug. 06-09, 2017) p. 918-921. Piscataway, NJ, USA : IEEE.

Wasim Hussain, Yvon Savaria, Yves Blaquiere. 2016. « A compact spatially configurable differential input stage for a field programmable interconnection network ». IEEE International Symposium on Circuits and Systems (ISCAS) (Montréal, QC, Canada, May 22-25, 2016) p. 313-316. Institute of Electrical and Electronics Engineers Inc..

Gontran Sion, Yves Blaquière, Yvon Savaria. 2015. « Defect diagnosis algorithms for a field programmable interconnect network embedded in a very large area integrated circuit ». 21st IEEE International On-Line Testing Symposium (IOLTS) (Halkidiki, Greece, July 06-08, 2015) p. 83-88. IEEE.

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco. 2015. « An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs ». 2015 IEEE East-West Design & Test Symposium (EWDTS) (Batumi, GA, USA, Sept. 26-29, 2015) IEEE.

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco. 2015. « Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis ». 2015 IEEE 21st International On-Line Testing Symposium (IOLTS) (Halkidiki, Greece, July 6-8, 2015) p. 36-39. Piscataway, NJ, USA : IEEE.

Yves Blaquière, Yan Basile-Bellavance, Safa Berrima, Yvon Savaria. 2014. « Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain ». IEEE International Symposium on Circuits and Systems (ISCAS) (Melbourne, VIC, Australia, June 01-05, 2014) p. 2559-2562. IEEE.

Karim Baratli, Ahmed Lakhssassi, Yves Blaquière, Yvon Savaria. 2013. « A netlist pruning tool for an electronic system prototyping platform ». IEEE 11th International New Circuits and Systems Conference (NEWCAS) (Paris, France, June 16-19, 2013) IEEE Computer Society.

Mikael Guillemot, Yves Blaquière, Yvon Savaria. 2013. « Software rendering methods to display wafer scale integrated circuit dataset ». 26th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2013) (Regina, SK, Canada, May 05-08, 2013) IEEE.

Wasim Hussain, Yvon Savaria, Yves Blaquière. 2013. « An interface for the I2C protocol in the WaferBoard ». IEEE International Symposium on Circuits and Systems (ISCAS2013) (Beijing, China, May 19-23, 2013) p. 1492-1495. IEEE.

Nicolas Laflamme-Mayer, Mohamad Sawan, Yves Blaquière. 2013. « A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems ». IEEE Fourth Latin American Symposium on Circuits and Systems (LASCAS) (Cusco, Peru, Feb. 27-Mar. 01, 2013) IEEE Computer Society.

Omar Al-Terkawi Hasib, Walder André, Yves Blaquière, Yvon Savaria. 2012. « Propagating analog signals through a fully digital network on an electronic system prototyping platform ». IEEE International Symposium on Circuits and Systems (ISCAS) (Seoul, Korea, Republic of, May 20-23, 2012) p. 1983-1986. IEEE Computer Society.

Hai H. Nguyen, Mikael Guillemot, Yvon Savaria, Yves Blaquière. 2012. « A new approach for pin detection for an electronic system prototyping reconfigurable platform ». 23rd IEEE International Symposium on Rapid System Prototyping (RSP) (Tampere, Finland, Oct. 11-12, 2012) p. 122-127. IEEE Computer Society.

Michel Saydé, Ahmed Lakhssassi, Mohammed Bougataya, Omar Terkawi, Yves Blaquière. 2012. « SoC systems thermal monitoring using embedded sensor cells unit ». IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) (Boise, ID, USA, Aug. 05-08, 2012) p. 1052-1055. IEEE.

Mohamed Badreddine, Yves Blaquière, Mounir Boukadoum. 2011. « Machine-learning framework for automatic netlist creation ». IEEE International Symposium of Circuits and Systems (ISCAS) (Rio de Janeiro, Brazil, May 15-18, 2011) p. 2865-2868. IEEE.

Nicolas Laflamme-Mayer, Yves Blaquière, Mohamad Sawan. 2011. « A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systems ». 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (Beirut, Lebanon, Dec. 11-14, 2011) p. 25-28. IEEE Computer Society.

Nicolas Laflamme-Mayer, Mohamad Sawan, Yves Blaquière. 2011. « A dual-power rail, low-dropout, fast-response linear regulator dedicated to a wafer-scale electronic systems prototyping platform ». IEEE 9th International New Circuits and Systems Conference (NEWCAS) (Bordeaux, France, June 26-29, 2011) p. 438-441. IEEE Computer Society.

Olivier Valorge, Walder Andre, Yvon Savaria, Yves Blaquière. 2011. « Power supply analysis of a large area integrated circuit ». IEEE 9th International New Circuits and Systems Conference (NEWCAS) (Bordeaux, France, June 26-29, 2011) p. 398-401. IEEE Computer Society.

Oussama Berriah, Mohammed Bougataya, Ahmed Lakhssassi, Yves Blaquière, Yvon Savaria. 2010. « Thermal analysis of a miniature electronic power device matched to a silicon wafer ». 8th IEEE International NEWCAS Conference (Montreal, QC, Canada, June 20-23, 2010) p. 129-132. IEEE.

Mohammed Bougataya, Oussama Berriah, Ahmed Lakhssassi, Adel-Omar Dahmane, Yves Blaquière, Yvon Savaria, Richard Norman, Richard Prytula. 2010. « Thermo-mechanical analysis of a reconfigurable wafer-scale integrated circuit ». IEEE International Conference on Electronics, Circuits, and Systems (ICECS) (Athens, Greece, Dec. 12-15, 2010) p. 315-318. IEEE Computer Society.

Mamadou D. Diop, Moufid Radji, Walder Andre, Yves Blaquière, Anas A. Hamoui, Ricardo Izquierdo. 2010. « Electrical characterization of annular through silicon vias for a reconfigurable wafer-sized circuit board ». IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) (Austin, TX, USA, Oct. 25-27, 2010) p. 245-248. IEEE Computer Society.

Nicolas Laflamme-Mayer, Olivier Valorge, Yves Blaquière, Mohamad Sawan. 2010. « A low-power, small-area voltage reference array for a wafer-scale prototyping platform ». 8th IEEE International NEWCAS Conference (NEWCAS) (Montreal, QC, Canada, June 20-23, 2010) p. 189-192. IEEE Computer Society.

Olivier Valorge, Yves Blaquière, Yvon Savaria. 2010. « A spatially reconfigurable fast differential interface for a wafer scale configurable platform ». IEEE International Conference on Electronics, Circuits, and Systems (ICECS) (Athens, Greece, Dec. 12-15, 2010) p. 1176-1179. IEEE Computer Society.

Yan Basile-Bellavance, Yves Blaquière, Yvon Savaria. 2009. « Faults diagnosis methodology for the waferNet interconnection network ». Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009) IEEE Computer Society.

Etienne Lepercq, Yves Blaquière, Richard Norman, Yvon Savaria. 2009. « Workflow for an electronic configurable prototyping system ». IEEE International Symposium on Circuits and Systems (ISCAS) (Taipei, Taiwan, May 24-27, 2009) p. 2005-2008. IEEE.

Étienne Lepercq, Olivier Valorge, Yan Basile-Bellavance, Nicolas Laflamme-Mayer, Yves Blaquière, Yvon Savaria. 2009. « An interconnection network for a novel reconfigurable circuit board ». 2nd Microsystems and Nanoelectronics Research Conference (MNRC) (Ottawa, ON, Canada, Oct. 13-14, 2009) p. 53-56. IEEE.

Yan Basile-Bellavance, Etienne Lepercq, Yves Blaquière, Yvon Savaria. 2008. « Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL ». 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (St. Julian's, Malta, Aug. 31-Sept. 03, 2008) p. 1159-1162. IEEE.

Mohammed Bougataya, Ahmed Lakhsasi, Richard Norman, Richard Prytula, Yves Blaquière, Yvon Savaria. 2008. « Steady state thermal analysis of a reconfigurable wafer-scale circuit board ». IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (Niagara Falls, ON, Canada, May 04-07, 2008) p. 411-415. IEEE.

Richard Norman, Etienne Lepercq, Yves Blaquière, Olivier Valorge, Yan Basile-Bellavance, Richard Prytula, Yvon Savaria. 2008. « An interconnection network for a novel reconfigurable circuit board ». Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Montreal, QC, Canada, June 22-25, 2008) p. 129-132. IEEE.

Richard Norman, Olivier Valorge, Yves Blaquière, Etienne Lepercq, Yan Basile-Bellavance, Youssef El-Alaoui, Richard Prytula, Yvon Savaria. 2008. « An active reconfigurable circuit board ». Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Montreal, QC, Canada, June 22-25, 2008) p. 351-354. IEEE.

Olivier Valorge, Anh Tuan Nguyen, Yves Blaquière, Richard Norman, Yvon Savaria. 2008. « Digital signal propagation on a wafer-scale smart active programmable interconnect ». 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (St. Julian's, Malta, Aug. 31 - Sept. 03, 2008) p. 1059-1062. IEEE.

Yves Blaquière, Yvon Savaria, Jaouad El Fouladi. 2007. « Digital measurement technique for capacitance variation detection on integrated circuit I/Os ». 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (Marrakech, Morocco, Dec. 11-14, 2007) p. 42-45. IEEE.

M.-A. Cantin, Y. Savaria, Y. Blaquière, E. Granger, P. Lavoie. 2000. « Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm ». ISCAS 2000 Geneva : proceedings of the 2000 IEEE International Symposium on Circuits and Systems (Geneva, Switzerland, May 28-31, 2000) p. 141-144. IEEE.

M.-A. Cantin, E. Granger, Y. Savaria, Y. Blaquière, P. Lavoie. 1999. « Four implementations of the fuzzy ART neural network for high data throughput applications ». Proceedings of the third International Conference on Cognitive and Neural Systems (ICCNS'99) (Boston, MA, USA, May 26-29, 1999) p. 15.

M.-A. Cantin, Y. Blaquière, Y. Savaria, E. Granger, P. Lavoie. 1998. « Implementation of the fuzzy ART neural network for fast clustering of radar pulses ». Proceedings of the 1998 International Symposium on Circuits and Systems (ISCAS'98) (Monterey, CA, USA, May 31-June 3, 1998) p. 458-461. IEEE.

Pascal Poiré, Marc-André Cantin, Hervé Daniel, Yves Blaquière, Yvon Savaria. 1998. « A comparative analysis of fuzzy ART neural network implementations: the advantages of reconfigurable computing ». IEEE Symposium on FPGAs for Custom Computing Machines (Napa Valley, CA, USA, Apr. 15-17, 1998) p. 304-305. IEEE Computer Society.

Pascal Poire, Yvon Savaria, Herve Daniel, Marc-André Cantin, Yves Blaquiere. 1998. « Hardware/software codesign of a fuzzy ART neural clusterer: the benefits of configurable computing ». Configurable Computing: Technology and Applications (Boston, MA, USA, Nov. 02-03, 1998) p. 90-96. SPIE.

E. Granger, Y. Blaquière, Y. Savaria, M.-A. Cantin, P. Lavoie. 1996. « A VLSI architecture for fast clustering with the fuzzy ART neural networks ». Proceedings of the International Workshop on Neural Networks for Identification, Control, Robotics and Signal/Image Processing (NICROSP'96) (Venice, Italy, Aug. 21-23, 1996) p. 117-125. IEEE.

Yves Blaquière, Gabriel Gagné, Yvon Savaria, Claude Évéquoz. 1995. « Cost analysis of a new algorithmic-based soft-error tolerant architecture ». IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (DFT'95) (Lafayette, LA, USA, Nov. 13-15, 1995) p. 189-197. IEEE.

Yves Blaquière, Michel Dagenais, Yvon Savaria. 1993. « A new accurate and hierarchical timing analysis approach ». European Conference on Design Automation with the European Event in ASIC Design (Paris, France, Feb. 22-25, 1993) p. 449-454. IEEE Computer Society Press.

Yves Blaquière, Michel Dagenais, Yvon Savaria. 1991. « Fast timing analysis of VLSI circuits: A dynamic and hierarchical approach ». IEEE International Symposium on Circuits and Systems Part 4 (of 5) (Singapore, June 11, 1991 - June 14, 1991) p. 2398-2402. IEEE.

Y. Blaquière, Y. Savaria. 1985. « Area overhead analysis of soft-errors filtering register ». Canadian Conference on Very Large Scale Integration, Toronto, November 4-5, 1985 : technical digest = 1985 Conférence canadienne sur l'intégration à très grande échelle (VLSI), Toronto, 4-5 Novembre, 1985 (Toronto, ON, Canada, 04-05 nov. 1985) p. 26-29.

H. Bensalem, Y. Blaquière. 2019. « In-system monitoring of OpenCL-Based designs on FPGA ». Communication during a conference : LACIME First Annual Congress ( Montréal, QC, Canada, 21 fév. 2019 )

Yves Blaquière. 2019. « Configurability: from FPGA to Electronic Systems and Power Microsystems ». Communication during a conference : LACIME First Annual Congress ( Montréal, QC, Canada, 21 fév. 2019 )

Yves Blaquière. 2015. « Toward an enhanced programmable device ». Communication during a conference : 9th NAMIS International Summer School : Nano and Micro Systems ( Montreal, QC, Canada, June 29-July 03, 2015 )

Yves Blaquière. 2014. « Toward an enhanced programmable device ». Communication during a conference : Journée de l'Innovation ReSMiQ ( Montreal, QC, Canada, 18 sept. 2014 )

Yves Blaquière. 2012. « Waferboard(TM) : Prototypage rapide pour les systèmes électroniques ». Communication during a conference : Séminaire IEEE de la branche étudiante de l'UQAM ( Montreal, QC, Canada, Déc. 2012 )

Y. Savaria, M. Guillemot, H. H. Nguyen, Y. Blaquière, A. Lakhssassi. 2012. « Technologies at the heart of a wafer scale rapid prototyping electronic system ». Communication during a conference : CMOS Emerging Technologies (CMOSET) ( Vancouver, BC, Canada, July 18-20, 2012 )

C. Thibeault, S. Pichette, Y. Audet, Y. Savaria, H. Rufenacht, E. Gloutnay, et al.. 2012. « On extra combinational delays in SRAM FPGAs due to radiations ». Communication during a conference : IEEE Nuclear and Space Radiation Effects Conference ( Miami, FL, USA, July 16-20, 2012 )

Yves Blaquière. 2011. « Le WaferBoard(TM) - une plateforme de prototypage rapide pour les systèmes électroniques ». Communication during a conference : Congrès ACFAS/Colloque annuel ReSMiQ ( Sherbrooke, QC, Canada, Mai 2011 )

A. Lakhssassi, Y. Savaria, M. Bougataya, Y. Blaquière, P. Popovic, M. Shields. 2011. « LAIC based system design : a thermo-mechanical and power issue ». Communication during a conference : CMC Microsystems Annual Symposium ( Gatineau, QC, Canada, Oct. 2011 )

Y. Savaria, Y. Blaquière. 2011. « A Wafer-Scale rapid electronic systems prototyping platform ». Communication during a conference : CMOS Emerging Technologies (CMOSET) ( Whistler, BC, Canada, June 15-17, 2011 )

Yves Blaquière. 2010. « Les compétences langagières dans un cours de microélectronique ». Communication during a conference : RUSAF : Soutenir les compétences langagières dans l'enseignement des disciplines : le rôle des mesures d'aide en français ( Montréal, QC, Canada, 11 juin 2010 )

Yves Blaquière. 2009. « Le WaferBoard(TM) - une plateforme de prototypage rapide pour les systèmes électroniques ». Communication during a conference : CoFaMic : La Confection et la Fabrication de Dispositifs Microélectroniques et Microsystèmes ( Montréal, QC, Canada, Févr. 2009 )

Yves Blaquière. 2006. « Le génie microélectronique et l'évolution des technologies ». Communication during a conference : Congrès annuel de l'Association des professeurs en sciences du Québec (APSQ) ( Montréal, QC, Canada, Nov. 2006 )

Yves Blaquière. 2005. « Le génie microélectronique et l'évolution des technologies - le changement grandeur nature ». Communication during a conference : Congrès de l'Association des professeurs en sciences du Québec (APSQ) ( Thetford Mines, QC, Canada, Oct. 2005 )

M. Darvishi, Y. Audet, Y. Blaquière. 2017. « Delay monitor circuit for sensitive nodes in SRAM-Based FPGA ». Poster presented during a conference : IEEE Nuclear and Space Radiation Effects Conference ( New Orleans, LA, USA, July 17-21, 2017 )

W. Hussain, Y. Blaquière, Y. Savaria. 2015. « Asynchronous ƩΔ-modulator based A/D converter for electronic system prototyping platform ». Poster presented during a conference : Congrès ACFAS/Colloque annuel ReSMiQ ( Rimouski, QC, Canada, 25-29 mai 2015 )

M. Darvishi, Y. Audet, Y. Blaquière, C. Thibeault. 2014. « Circuit level modeling of extra combinational delays in SRAM FPGAs due to transient ionizing radiation ». Poster presented during a conference : IEEE Nuclear and Space Radiation Effects Conference ( Paris, France, July 14-18, 2014 )

W. Hussain, Y. Blaquière, Y. Savaria. 2014. « An interface for open-drain bi-directional communication in field programmable interconnection networks ». Poster presented during a conference : TEXPO national competition (CMC Microsystems) ( Houston, TX, USA, Apr. 06-08, 2014 )

Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco. 2014. « Towards a realistic SEU effects emulation on SRAM based FPGAs ». Poster presented during a conference : IEEE Nuclear and space radiation effects (NRSEC) ( Paris, France, July 14-18, 2014 )

C. Thibeault, S. Pichette, Y. Audet, Y. Savaria, H. Rufenacht, E. Gloutnay, Et all. 2012. « Méthodologie de conception, vérification, et test des systèmes embarqués tolérants aux radiations ». Poster presented during a conference : AVIO403 Journée CRIAQ : Destination 2022 ( ,  )

M. D. Diop, Y. Blaquière, et al.. 2010. « Waferboard(TM) rapid prototyping platform for electronic systems ». Poster presented during a conference : TEXPO CMC Microsystems ( Ottawa, ON, Canada, Oct. 04-05, 2010 )

M. D. Diop, M. Radji, W. Andre, Y. Blaquière, A. A. Hamoui, R. Izquierdo. 2010. « Caractérisation électrique d'interconnexions avancées de type vias traversants (TSVs) pour une application à l'échelle d'un substrat ». Poster presented during a conference : 79e Congrès ACFAS/Colloque annuel ReSMiQ ( Sherbrooke, QC, Canada, Mai 2010 )

M.-A. Cantin, Y. Blaquière, Y. Savaria, P. Lavoie, E. Granger. 2000. « Effets de quantification sur l'implantation digital du réseau de neurone Fuzzy ». Poster presented during a conference : Congrès de l'ACFAS ( Montreal, QC, Canada, 15-19 mai 2000 )

Y. Savaria, Y. Blaquière, M.-A. Cantin, E. Granger, P. Poiré, H. Daniel. 2000. « Implementations of the fuzzy ART neural networks on three different plaforms for fast clustering of radar pulses ». Poster presented during a conference : GRIAO - Research review ( , 1998 )

M.-A. Cantin, Y. Savaria, Y. Blaquière, P. Lavoie, E. Granger, P. Poiré, et al.. 1998. « Implementations of the fuzzy ART neural networks on three different platforms for fast clustering of radar pulses ». Poster presented during a conference : TEXPO, Symposium on Microelectronics Research & Development in Canada ( ,  )

Y. Blaquière, G. Gagné, Y. Savaria, C. Evéquoz. 1995. « A new efficient algorithmic-based SEU tolerant system architecture ». Poster presented during a conference : 32nd Annual International Nuclear and Space Radiation Effects Conference ( Madison, WI, USA,  )

Mikaël Guillemot, Hai Nguyen, Mohammed Bougataya, Yves Blaquière, Ahmed Lakhssassi, Mary Shields, Yvon Savaria. 2014. « Wafer-scale rapid electronic systems prototyping platform : User support tools and thermo-mechanical validation ». In Novel advances in microsystems technologies and their applications . p. 69-102. CRC Press.

Walder André, Yves Blaquière, Yvon Savaria. 2011. « A wafer-scale rapid electronic systems prototyping platform ». In Advanced Applications of Rapid Prototyping Technology in Modern Engineering . p. 207-224. In tech.

Yvon Savaria, Yves Blaquière, Walder André. 2011. « Inter-reticle stitching rules and constraints for a wafer-scale integrated circuit ». «Application Note» CMC Microsystems.

Yvon Savaria, Yves Blaquière, Walder André. 2011. « Physical design flow and techniques for layout of wafer-scale circuit with through-silicon vias ». «Application Note» CMC Microsystems.

Karl Fecteau, Claude Thibeault, Yvon Savaria, Yves Blaquière, Jean-Jacques Laurin, Zhong-Fang Jin. 2009-10-27. « Methods, apparatus, and systems for reducing interference on nearby conductors  ».

Richard S. Norman, Yves Blaquière, Yvon Savaria. 2009-06-09. « Communications bus for a parallel processing system ».

Yvon Savaria, Yves Blaquière. 2004-03-09. « Methods, apparatus, and systems for reducing interference on nearby conductors ».