Cadence_Tools

Department of Electrical Engineering

Cadence University Program Member

This page provides information about the Cadence software used at our university and LACIME laboratory.
 
Cadence tools in our curriculum


Cadence software is being used primarily in the following course :

Class: SYS808 (formerly SYS834)
Prof: Claude Thibeault
Title: CMOS VLSI Design
#students: 12

Class: SYS811
Prof: Nicolas Constantin
Title: Analog Microelectronics
#students: 10 students

Cadence tools in our research

Prof Yves Blaquière, Frédéric Nabki, Nicolas Constantin :
Research: Integration of heterogeneous elements (ASIC, discrete components, MEMS) into Silicon-on-Package modules
Title: Configurable Integrated Power Input/Output Systems for Avionic Applications
#students: 16

Prof Frederic Nabki:
Research: Radiofrequency integrated circuits (RFICs)
Title: Novel circuits for wideband communications
#students: 2

Research: Analog integrated circuits
Title: Timing circuits utilising micromechanical resonators
#students: 2

Research: Analog integrated circuits
Title: Low power signal conditioning circuits for micromachined transducers
#students: 2

Prof Ghyslain Gagnon :
Research: Mixed-mode CMOS (custom IC)
Title: New Circuits for Time-Mode Signal Processing
#students: 0

Prof Claude Thibeault:
Research: Design, verification and test of self-timed design (Digital IC, verification)
Title: AnARM - Low Power Highly Testable Asynchronous Processor
Prof: Claude Thibeault and François Gagnon
#students: 2

Research: Analog IC verification (verification)
Title: Formal verification using test constraints
Prof: Claude Thibeault
#students: 1

Prof Nicolas Constantin
Research: Analog & RF IC design
Prof.: Nicolas Constantin
Title: CMOS Power Detectors for RFIC Power Amplifiers
#students: 1 students

Research: Analog & RF IC design
Prof.: Nicolas Constantin
Title: High Efficiency CMOS RFIC Power Amplifiers
#students: 1 student

Research: Analog IC design
Prof.: Nicolas Constantin
Title: Controller and Driver for Reconfigurable Power Supply
#students: 1 student   
   

Cadence software has been used in many research projects including :
  • The design of a 6-bit A/D flash converter, part of an advanced AGC for radar signals
  • The design of high-speed Sigma-Delta converter, part of a project exploring trade offs in Digital Signal Processing
  • The design of IC monitors, which have been used to validate new IC test & diagnostic methods
  • The development of an IC diagnosis tool for bridging faults combining three different data sources: IDDQ measurements, parasitic capacitances extracted from layout and logical faults detected at the primary outputs (including scan flip flops).
  • The design of an asynchronous ARM-like microprocessor
  • Ultra-wideband transceivers
  • Low power transimpedance amplifier
  • Wideband receivers
  • Control circuits for MEMS
  • Signal conditioning and analog to digital converter circuits for sensors
  • RFIC Power Amplifiers
  • Configurable Integrated Power Input/Output Systems for Avionic Applications




Here are the most relevant and recent publications related to these projects:


  • HASIB, O.A.T, CRÉPEAU, D., AWAD, T., DULIPOVICI, A., SAVARIA, Y., THIBEAULT, C., « Exploiting Built-In Delay Lines for Applying Launch-on-Capture At-Speed Testing on Self-Timed Circuits», IEEE VTS, April 2018.
  • A 0.8-4-GHz Software-Defined Radio Receiver With Improved Harmonic Rejection Through Non-Overlapped Clocking
A Bazrafshan, M Taherzadeh-Sani, F Nabki
IEEE Transactions on Circuits and Systems I: Regular Papers
  • Analysis of sensitivity and power consumption of chopping techniques for integrated capacitive sensor interface circuits
P Vejdani, K Allidina, F Nabki
Journal of Low Power Electronics and Applications 7 (4), 31
  • A 170-dB $\Omega $ CMOS TIA With 52-pA Input-Referred Noise and 1-MHz Bandwidth for Very Low Current Sensing
M Taherzadeh-Sani, SMH Hussaini, H Rezaee-Dehsorkh, F Nabki, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25
  • Berthiaume, David et Sharma, Smarjeet et Constantin, Nicolas. 2016. « Low current, 100MHz bandwidth envelope detector for CMOS RFIC PAs ». In IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (Vancouver, BC, Canada, May 15-18, 2016) Piscataway, NJ, USA : IEEE.
  • TRUDEAU, L.C., GAGNON, G., GAGNON, F., THIBEAULT, C., AWAD, T., MORRISSEY, D. « A Low-Latency, Energy-Efficient L1 Cache Based on a Self-Timed Pipeline », IEEE ASYNC, May 2015, p. 17-18.
  • S. Ziabakhsh, G. Gagnon and G. W. Roberts, "Wide Linear Range Voltage-Controlled Delay Unit for Time-Mode Signal Processing", in IEEE Symposium on Circuits and Systems (ISCAS), pp.1826-1829, 24-27 May 2015.
  • S. Ziabakhsh, G. Gagnon and G.W. Roberts, "Chapter 7: Time-Mode Delta-Sigma Converters" Yuan F. CMOS Time-Mode Circuits and Systems: Fundamentals and Applications, ISBN: 9781482298734, pp. 237-300, 2015
  • Richardson, F.-D.; Kouki, A.B.; Gagnon, G., "A CMOS RF power detector for an Automatic Impedance Matching System," New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International , vol., no., pp.157,160, 26-29 June 2011
  • THIBEAULT, C., HARIRI, Y.,« C Delta IDDQ: Improving Current-Based Testing and Diagnosis through Adapted Test Pattern Generation », IEEE Trans. on VLSI Systems, vol. 19, no. 1, janv. 2011
  • HARIRI, Y, THIBEAULT, C., « Fully Automated 3 Data-Source Diagnostic Tool», IET Computers & Digital Techniques, vol. 1, no 6, Nov. 2007, p. 694-705
  • THIBEAULT, C., HARIRI, Y., KHALED, K., « Exploring C_IDDQ Bridging Defect Diagnosis Capabilities ». IEEE Silicon Debug & Diagnosis Workshop, sept. 2011, paper 4.2.
  • HARIRI, Y , THIBEAULT, C., « On an Adaptive High Quality Test Optimization Strategy», IEEE Int. Workshop on Defect Based Testing., Santa Clara, Ca, Oct. 2006
  • G. Ayissi Eyebe, V. Nerguizian et N. G. Constantin, “A Low Current CMOS Voltage Regulator Including RF Desensitization for RFIC Power Amplifiers”, IEEE Canadian Conference on Electrical and Computer Engineering, numéro de catalogue IEEE: CFP12758-ART, mai 2012

Disclaimer : This is not Cadence Homepage. This page is only Cadence information-related. Information is provided "as is" without warranty or guarantee of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise.

Information is provided "as is" without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment.

Contact information :  Frédéric Nabki, Phd

Last updated : 05/03/2019

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