Claude Thibeault
Claude Thibeault
B.Ing. (UQAC), M.Sc.A., Ph.D. (École polytechnique)
Professeur
Département de génie électrique

PUBLICATIONS ET OEUVRES

Articles de revues avec comité de lecture (37) 

  • [RP16F]  GIARD, P., SARKIS, G., LEROUX, C., THIBEAULT, C., GROSS, W.J., «Low-Latency Software Polar Decoders », accepted for publication in Springer Journal on Signal Processing Systems, Sept. 2016. (CRSNG) 

  • [RP16E]  GIARD, P., BALATSOUKAS-STIMMING, A., SARKIS, G., THIBEAULT, C., GROSS, W.J., « Low-complexity polar decoders for low-rate codes », accepted for publication in Springer Journal on Signal Processing Systems, Sept. 2016. (CRSNG) 

  • [RP16D]  GIARD, P., SARKIS, G., THIBEAULT, C., GROSS, W.J., « Multi-Mode Unrolled Architectures for Polar Decoders », IEEE Transactions on Circuits & Systems I, vol. 63, no. 9, Sept. 2016. (CRSNG)

  • [RP16C]  SOUARI, A., THIBEAULT, C., BLAQUIÈRE, Y., VELAZCO, R. «Towards an Efficient SEU Effects Emulation on SRAM-Based FPGAs », accepted for publication in Elsevier Microelectronics Reliability, Sept. 2016. (CRSNG) 

  • [RP16B]  GHODBANE, A., SAAD, M., BOLAND, J.F HOBEIKA, C., THIBEAULT, C., « Design of a tolerant flight control system in response to multiple actuator control signal faults induced by cosmic rays », IEEE Transactions on Aerospace and Electronic Systems, vol. 52, no. 2, Feb. 2016. (CRSNG)

  • [RP16A]  SARKIS, G., GIARD, P., VARDY, A., THIBEAULT, C., GROSS, W., «Fast List Decoders for Polar Codes », IEEE Journal on Selected Areas in Comm.,vol 34, no 2, 2016, p. 318-328. (CRSNG)

  • [RP15C]  SARKIS, G., GIARD, P., VERDY, A., THIBEAULT, C., GROSS, W., «Fast List Decoders: for Polar Codes», accepté pour publication dans IEEE JOURNAL on Selected Areas in Comm. (Décembre 2015, CRSNG)

  • [RP15B]  GIARD, P., SARKIS, G., THIBEAULT, C., GROSS, W., «237 Gbit/s unrolled hardware polar decoder», Electronics Letters, vol. 51, no. 10, 2015, p. 762-763. (CRSNG)

  • [RP15A]  HOBEIKA C., THIBEAULT C., BOLAND J.F., «Functional Constraint Extraction from Register Transfer Level for ATPG », IEEE Trans. on VLSI Systems, vol. 23, no. 2, 2015, p. 407-412. (CRSNG)

  • [RP14F]  GHODBANE, A, SAAD, M., BOLAND, J.F. et THIBEAULT, C., «Applied actuator fault accommodation in flight control systems using fault reconstruction based FDD and SMC reconfiguration », International Journal of Computer, Information, Systems and Control Engineering, vol. 8, no. 7. p. 1044-1049, 2014.

  • [RP14E]  HOBEIKA C., THIBEAULT C., BOLAND J.F., «Functional Constraint Extraction from Register Transfer Level for ATPG», accepté pour publication dans IEEE Trans. on VLSI Systems, Fév. 2014. (CRSNG)

  • [RP14D]  HOQUE, K. A., MOHAMED, O.A., SAVARIA, Y., THIBEAULT, C., «Early Analysis of Soft Error Effects for Aerospace Applications Using Probabilistic Model Checking», Formal Techniques for Safety-Critical Systems, Springer, Jan. 2014. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [RP14C]  TAZI F.Z., THIBEAULT, C., SAVARIA, Y., PICHETTE, S., AUDET, Y., «On Extra Delays affecting I/O blocks of an SRAM FPGA Due to Ionizing Radiations», IEEE Trans. on Nuclear Science, Vol. 61, No. 6, Dec. 2014, pp.3138-3145 (CRSNG, MDEIE, CRIAQ, MITACS); version étendue du poster présenté à IEEE NSREC 2014.

  • [RP14B]  DARVISHI, M., AUDET, Y., BLAQUIÈRE, Y., THIBEAULT, C., PICHETTE, S., TAZI F.Z., «Circuit Level Modeling of Extra Combinational Delays in SRAM-Based FPGAs Due to Transient Ionizing Radiation», IEEE Trans. On Nuclear Science, vol. 61, no 6, 2014, p. 3535-3542 (CRSNG, MDEIE, CRIAQ, MITACS); version étendue du poster presenté à IEEE NSREC 2014.

  • [RP14A]  SARKIS, G., GIARD, P., THIBEAULT, C., GROSS, W., «Fast Polar Decoders: Algorithm and Implementation », IEEE JOURNAL on Selected Areas in Comm.,vol 32, no 5, 2014, p. 946-957. (CRSNG)

  • [RP13C]  GAGNÉ, R., BELZILE, J., THIBEAULT, C., «A True Glitch Masking Circuitry», Electrical and Power Engineering Frontier, vol. 2, no. 4, Dec. 2013. (CRSNG)

  • [RP13B]  HOBEIKA, C., PICHETTE, S., GHODBANE, A., THIBEAULT, C., AUDET, Y., SAAD, M., BOLAND, J.F.,  «Flight Control Fault Models Based on SEU Emulation», SAE International Journal of Aerospace, Dec. 2013, available at: saeaero.saejournals.org/. (CRSNG, CRIAQ, MITACS, MDEIE)

  • [RP13A]  THIBEAULT, C., HARIRI, Y., HASAN, S.R., HOBEIKA, C., SAVARIA, Y., AUDET, Y., TAZI  F.Z., «A Library-Based Early Soft Error Rate Estimation Technique for SRAM-based FPGA Design», Journal of Electronic Testing: Theory and Applications, Springer, vol. 29, no. 4, 2013, p. 457-471. (CRSNG, CRIAQ, MITACS, MDEIE)

  • [RP12C]  TRENTIN, D., SAVARIA, Y., ZHU, G., THIBEAULT, C., «An AFDX Switch Fabric Hardware Core for Avionic Network Prototyping and Characterization», SAE International Journal of Aerospace, Oct. 2012, disponible sur: saeaero.saejournals.org/. (CRSNG)

  • [RP12B]  TREMBLAY, J.P., SAVARIA, Y., ZHU, G., THIBEAULT, C., BOUANEN. S., «A System Architecture for Smart Sensors Integration in Avionics Applications», SAE International Journal of Aerospace, Oct. 2012, disponible sur: saeaero.saejournals.org/. (CRSNG)

  • [RP12A]  THIBEAULT, C., PICHETTE, S., AUDET, Y., SAVARIA, Y., RUFENACHT, H. GLOUTNAY, E., BLAQUIÈRE, Y., MOUPFOUMA, F., BATANI, N., «On Extra Combinational Delays in SRAM FPGAs Due to Transient Ionizing Radiations», accepté à IEEE Trans. On Nuclear Science (CRSNG, MDEIE, CRIAQ, MITACS); version étendue de l’article accepté à IEEE NSERC2012.

  • [RP11C]  THIBEAULT, C., HARIRI, Y., HOBEIKA C., «Tester Memory Requirements and Test Application Time Reduction for Delay Faults with Digital Captureless Test Sensors», Journal of Electronic Testing: Theory and Applications, Springer, vol. 28, no.  2, 2012, p. 229-242. (CRSNG)

  • [RP11B]  DESPINS, C., et al., «Leveraging Green Communications For Carbon Emission Reductions: Techniques, Testbeds And Emerging Carbon Footprint Standards», IEEE Communications magazine, vol. 49, no. 8, Août 2011, p. 101-109. (PROMPT)

  • [RP11A]  THIBEAULT, C., HARIRI, Y., «CΔIDDQ: Improving Current-Based Testing and Diagnosis through Adapted Test Pattern Generation», IEEE Trans. on VLSI Systems, vol. 19, no. 1, janv. 2011. (CRSNG)

  • [RP09A]  GAGNÉ, R., BELZILE, J., THIBEAULT, C., «From Synchronous to GALS: A New Architecture for FPGAs», Microelectronics Journal, vol. 40, no. 11, 2009, p. 1657-1666. (CRSNG)


12 autres articles avant 2008.

 Autres contributions avec comité de lecture (114) 

  • [C16F]  GIARD, P., BALATSOUKAS-STIMMING, A., MÜLLER, T.C., BURG, A., THIBEAULT, C., GROSS, W.J., « A multi-Gbps unrolled hardware list decoder », in Asilomar Conf. on Signals, Syst., and Computers, Nov. 2016, to appear. (CRSNG)

  • [C16E]  AL-TERKAWI, O., SAVARIA, Y., THIBEAULT, C., « WeSPer: A flexible small delay defect quality metric», IEEE VTS, April 2016. (CRSNG)

  • [C16D]  TAZI F.Z., THIBEAULT, C., SAVARIA, Y., « Detailed Analysis of Radiation-Induced Delays on I/O Blocks of an SRAM-Based FPGA”, IEEE CCECE, May 2016, (CRSNG, MDEIE, CRIAQ, MITACS), invited session.

  • [C16C]  GIARD, P., SARKIS, G., BALATSOUKAS-STIMMING, A., FAN, Y., TSUI, C.Y., BURG, A., THIBEAULT, C., GROSS, W.J., « Hardware decoders for polar codes: an overview», in IEEE Int. Symp. on Circuits and Syst. (ISCAS), May 2016. (CRSNG)

  • [C16B]  FIORENTINO, M., SAVARIA, Y., THIBEAULT, C., GERVAIS, P. « A practical design method for prototyping self-timed processors using FPGAs», IEEE ISCAS, May 2016. (CRSNG)

  • [C16A]  HASHEMI, S.A., BALATSOUKAS-STIMMING, A., GIARD, P., THIBEAULT, C., GROSS, W.J., « Partitioned successive-cancellation list decoding of polar codes», in IEEE Int. Conf. on Acoustics, Speech, and Signal Process. (ICASSP), March 2016. (CRSNG)

  • [C15F]  GIARD, P., SARKIS, G., THIBEAULT, C., GROSS, W.J., « A 638 Mbps Low-Complexity Rate 1/2 Polar Decoder on FPGAs », IEEE Workshop on Signal Processing Systems, Hangzhou, China, Oct. 2015, p. 1-6 (CRSNG)

  • [C15E]  LÉONARD, M.A., BOLAND, J.F., JÉGO, C., THIBEAULT, C., « Towards Analysis of the Radiation Sensitivity of Digital Designs at High Level of Abstraction », SAE 2015 Aerospace Electronics and Avionics Systems Conference, Sept. 2015 (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C15D]  SOUARI, A., THIBEAULT, C., BLAQUIÈRE, Y., VELAZCO, R. « An Automated Fault Injection for evaluation of LUTs Robustness in SRAM-based FPGAs », IEEE EWDTS, Sept. 2015 (CRSNG)  

  • [C15C]  SOUARI, A., THIBEAULT, C., BLAQUIÈRE, Y., VELAZCO, R. « Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis », IEEE IOLTS, July. 2015, p. 36-39 (CRSNG) 

  • [C15B]  FIORENTINO, M., AL-TERKAWI, O., SAVARIA, Y., THIBEAULT, C., « Self-timed circuits FPGA implementation flow», IEEE NEWCAS, June 2015, p. 1-4. (CRSNG)

  • [C15A]  TRUDEAU, L.C., GAGNON, G., GAGNON, F., THIBEAULT, C., AWAD, T., MORRISSEY, D. « A Low-Latency, Energy-Efficient L1 Cache Based on a Self-Timed Pipeline », IEEE ASYNC, May 2015, p. 17-18. (CRSNG)

  • [C14G]  HOQUE, K. A., MOHAMED, O.A., SAVARIA, Y., THIBEAULT, C., « Probabilistic model checking based DAL analysis to optimize a combined TMR-blind-scrubbing mitigation technique for FPGA-based aerospace applications », Formal Methods and Models for Codesign (MEMOCODE), 2014 Twelfth ACM/IEEE International Conference on, Oct. 2014. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C14F]  GHODBANE, A., SAAD, M., BOLAND, J.F., THIBEAULT, C., « Sliding Mode Reconfigurable Control for Cosmic Rays Faults in Flight Systems», ASME Int. Mec. Emg. Congress and Expo., 2014, Nov, Montreal, Canada.

  • [C14E]  SARKIS, G., GIARD, P., VERDY, A., THIBEAULT, C., GROSS, W., «Increasing the speed of polar list decoders», IEEE Workshop on Signal Processing Systems, Oct. 2014, p. 1-6 (CRSNG)

  • [C14D]  JALLOUL, T., AJIB, W., YESTE-OJEDA, O.A., LANDRY R., THIBEAULT, C., «DME/DME navigation using a single low-cost SDR and sequential operation», IEEE DASC, Oct. 2014, (CRSNG). Best session paper award.

  • [C14C]  HOBEIKA C., PICHETTE S., LEONARD M.A., THIBEAULT C., BOLAND J.F., AUDET, Y., «Multi-abstraction level signature generation and comparison based on radiation single event upset», accepté à IEEE IOLTS 2014. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C14B]  GHODBANE, A., SAAD, M., BOLAND, J.F., THIBEAULT, C., «Cosmic rays fault accommodation in flight control systems using fault reconstruction based FDD and SMC reconfiguration», ICMICE 2014, July, Czech Republic.

  • [C14A]  GIARD, P., SARKIS, G., THIBEAULT, C. and GROSS, W.J., «Fast Software Polar Decoders», accepté à IEEE ICASSP, Florence, Italy, May 4-9, 2014. (CRSNG)

  • [C13G]  HOQUE, K. A., MOHAMED, O.A., SAVARIA, Y., THIBEAULT, C., «Early Analysis of Soft Error Effects for Aerospace Applications Using Probabilistic Model Checking», IEEE FTSCS 2013 Aerospace Electronics and Avionics Systems Conference, Oct. 2013. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C13F]  BOUANEN. S., THIBEAULT, C., SAVARIA, Y., TREMBLAY, J.P., ZHU, G., «Fault Tolerant Smart Transducer Interfaces for Safety-Critical Avionics Applications», IEEE DASC, Oct. 2013. (CRSNG)

  • [C13E]  TREMBLAY, J.P., SAVARIA, Y., THIBEAULT, C., BOUANEN. S., ZHU, G., «A Hardware Prototype for Integration, Test, and Validation of Avionic Networks», IEEE DASC, Oct. 2013. (CRSNG)  Best student paper award, Best session paper award.

  • [C13D]  HOBEIKA, C., PICHETTE, S., GHODBANE, A., THIBEAULT, C., AUDET, Y., SAAD, M., BOLAND, J.F., «Flight Control Fault Models Based on SEU Emulation», SAE 2013 Aerospace Electronics and Avionics Systems Conference, Sept. 2013. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C13C]  GHODBANE, A., SAAD, M., BOLAND, J.F., THIBEAULT, C., «Design of an Actuator Fault Tolerant Flight Control System Using Fault Detection and Diagnosis», SAE 2013 Aerospace Electronics and Avionics Systems Conference, Sept. 2013. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C13B]  ISMAILI, Z.E.A., NABKI, F., AJIB, W., THIBEAULT, C., «A 0.356.25 GHz Cognitive Radio Frequency Synthesizer Architecture», IEEE MWSCAS2013 (Aug. 2013. (CRSNG, CRIAQ)

  • [C13A]   ROBACHE, R. , BOLAND, J.-F., THIBEAULT, C., SAVARIA, Y., «A Methodology for System-level Fault Injection Based on Gate-level Faulty Behavior», IEEE NEWCAS2013, June 2013. (CRSNG, MDEIE, CRIAQ, MITACS)

  • [C12J]  THIBEAULT, C., LARCHE, J., «On the impact of multiple clock domains and intermodulation products on test», IEEE DATA2012, nov. 2012. (CRSNG)

  • [C12I]  GIARD, P., KADDOUM, G., GAGNON, F. THIBEAULT, C., «FPGA Implementation and Evaluation of Discrete-time Chaotic Generators Circuits», IECON 2012, oct. 2012.

  • [C12H]  TRENTIN, D., SAVARIA, Y., ZHU, G., THIBEAULT, C., «An AFDX Switch Fabric Hardware Core for Avionic Network Prototyping and Characterization», présenté à SAE 2012 Aerospace Electronics and Avionics Systems Conference, oct. 2012. (CRSNG)

  • C12G]  TREMBLAY, J.P., SAVARIA, Y., ZHU, G., THIBEAULT, C., BOUANEN, S., «A System Architecture for Smart Sensors Integration in Avionics Applications», présenté à SAE 2012 Aerospace Electronics and Avionics Systems Conference, oct. 2012. (CRSNG)

  • [C12F]  BOUANEN, M., GAGNON, F. KADDOUM, G., COUILLARD, D., THIBEAULT, C., « An LPI/LPD Design for Secure OFDM Systems», MILCOM2012, oct. 2012. (CRSNG)

  • [C12E]  LEDUC-PRIMEAU, F., RAYMOND, A. J., GIARD, P., THIBEAULT, C., GROSS, W., «High-Throughput LDPC Decoding Using The RHS Algorithm», DASIP2012, oct. 2012. (CRSNG)

  • [C12D]  NARSINGHANI J., AN H., HO H., THIBEAULT, C., LIU F., QUINN J., MALLARD R.E., «Implementation of design for test methodology in a mixed signal 3D stacked integrated circuit», présenté à IEEE VTS 2012, avril 2012.

  • [C12C]  JOLIVEAU, M., MOAZZAMI K., GENDREAU, M., GAGNON, F., THIBEAULT, C., «Recherche tabou itérée pour la conception de filtres numériques non-récursifs à faible consommation de puissance», ROADEF 2012, avril 2012.

  • [C12B]  THIBEAULT, C., PICHETTE, S., AUDET, Y., SAVARIA, Y., RUFENACHT, H. GLOUTNAY, E., BLAQUIÈRE, Y., MOUPFOUMA, F., BATANI, N. «On Extra Combinational Delays in SRAM FPGAs Due to Radiations», présenté à IEEE NSERC2012 , juillet 2012. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C12A]  GHODBANE, A., SAAD, M., BOLAND, J.F., THIBEAULT, C., «Fault Tolerant Flight Control System using EMMAE Method and Reconfiguration with Sliding Mode Technique», IEEE CCECE, mai 2012. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [C11D]  IROBI, S., Al-ARS, Z., HAMDIOUI, S. THIBEAULT, C., «Testing for Parasitic Memory Effect in SRAMs», IEEE Asian Test Symposium, nov. 2011, p. 407-412. (CRSNG)

  • [C11C]  THIBEAULT, C., HARIRI, Y., KHALED, K., «Exploring CΔIDDQ Bridging Defect Diagnosis Capabilities», IEEE Silicon Debug & Diagnosis Workshop, sept. 2011, paper 4.2. (CRSNG)

  • [C11B]  JOLIVEAU, M., GENDREAU, M., GAGNON, F. THIBEAULT, C., «Low Power Non-Recursive Digital Filters with Unconstrained Topology». IEEE ECCTD, août 2011, p. 865-868.

  • C11A]  JOLIVEAU, M., GIARD, P., GENDREAU, M., GAGNON, F., THIBEAULT, C., «Design of Low Complexity Multiplierless Digital Filters With Optimized Free Structure Using a Population-Based Metaheuristic», IEEE ISSCS, juillet 2011, p. 1-4.

  • [C10A]  HOBEIKA, C., THIBEAULT, C., BOLAND, J.F., «Illegal State Extraction from Register Transfer Level», IEEE NEWCAS, juin 2010. (CRSNG)

 73 autres articles avant 2010.

Affiches présentées dans des conférences (7)

  • [AC14C]  TAZI, F.Z., THIBEAULT, C., SAVARIA, Y., PICHETTE, S., AUDET, Y., «On Delay Faults Affecting I/O Blocks of an SRAM-Based FPGA Due to Ionizing Radiations», accepté à IEEE NSREC 2014. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [AC14B]  DARVISHI, M., AUDET, Y., BLAQUIÈRE, Y., THIBEAULT, C., «Circuit Level Modeling of Extra Combinational Delays in SRAM FPGAs Due to Transient Ionizing Radiation», accepté à IEEE NSREC 2014. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [AC14A]  SOUARI, A., THIBEAULT, C., BLAQUIÈRE, Y., VELAZCO, R., «Towards a Realistic SEU Effects Emulation on SRAM Based FPGAs», accepté à IEEE NSREC 2014. (CRSNG/CRIAQ/MDEIE/MITACS)

  • [AC09A]  HOBEIKA, C., THIBEAULT, C., BOLAND, J.-F, «Utilisation des tests structurels dans la vérification fonctionnelle», 77ième congrès de l’ACFAS, colloque du RESMIQ : Microsystèmes innovateurs pour une meilleure qualité de vie, Ottawa, May 2009.

  • [AC09B]  GAGNÉ, R., BELZILE, J., THIBEAULT, C., «Émulation de composants asynchrones sur FPGA pour conception GAL», 77ième congrès de l’ACFAS, colloque du RESMIQ : Microsystèmes innovateurs pour une meilleure qualité de vie, Ottawa, May 2009.

  • [AC09C]  HOBEIKA, C., THIBEAULT, C., BOLAND, J.-F,  «Utilisation des tests structurels dans la vérification fonctionnelle», IEEE VLSI Test Symposium, Santa Cruz, Ca, May 2009. BEST STUDENT POSTER AWARD.

  • [AC08A]  GAGNÉ, R., BELZILE, J., THIBEAULT, C., «Jadis synchrone, bientôt GALS: L’hétérogénéité des architectures de FPGA», FETCH08, Montebello, January 2008. BEST THESIS AWARD.


 
BREVETS ET DROITS DE PROPRIÉTÉ INTELLECTUELLE

 Brevets obtenus (17)

  • [BR14a] US Patent 8,743,177, ROUTHIER, N., THIBEAULT, C., et al., « Process and system for encoding and playback of stereoscopic video sequences », November 2010. (Sensio)

  • [BR16a] CA Patent 2481423, ROUTHIER, N., THIBEAULT, C., « Système et procédé de codage de séquences vidéo stéréoscopiques », Jan. 2016. (CRSNG)

  • [BR14b] US Patent 8,804,842, ROUTHIER, N., THIBEAULT, C., et al., « Process and system for encoding and playback of stereoscopic video sequences », November 2010. (Sensio)

  • [BR13a] CA Patent 2580547, GAGNON, F., et al., « Multi-equalization method and apparatus », May 2013. (PROMPT)

  • [BR10c] CA Patent 2407766, THIBEAULT, C., « Système et procédé de test de circuit intégré VDDQ », juin 2010. (CRSNG)

  • [BR10b] US Patent 7,844,001, ROUTHIER, N., THIBEAULT, C., et al., « Process and system for encoding and playback of stereoscopic video sequences », November 2010. (Sensio)

  • [BR10a] US Patent 7,693,490, GAGNON, F., et al., « Multi-equalization method and apparatus », April 2010. (PROMPT)

  • [BR09b] US Patent 7,609,778, FECTEAU, K., THIBEAULT, C., et al., « Methods, apparatus, and systems for reducing interference on nearby conductors », October 2009. (Hyperchip)

  • [BR09a] US Patent 7,580,463, ROUTHIER, N., THIBEAULT, C., et al., « Process and system for encoding and playback of stereoscopic video sequences », August 2009. (Sensio)

  • [BR08a] CA Patent 2413518, THIBEAULT, C., « Système et méthode d'essai de circuits intégrés », novembre 2008. (CRSNG)

7 autres brevets obtenus avant 2008.

Brevet déposé (1)

1 demande de brevet US déposée en 2012.



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claude.thibeault@etsmtl.ca